LTM4645 datasheet(22/34 Pages) LINER

22 / 34 page

LTM4646

4646f

For more information www.linear.com/LTM4646

manner that yields insight and guidance pertaining to

one’s application-usage, and can be adapted to corre-

late thermal performance to one’s own application. The

Pin Configuration section gives four thermal coefficients

explicitly defined in JESD51-12; these coefficients are

quoted or paraphrased below:

JA, the thermal resistance from junction to ambient,

is the natural convection junction-to-ambient air ther-

mal resistance measured in a one cubic foot sealed

enclosure. This environment is sometimes referred to

as “still air” although natural convection causes the

air to move. This value is determined with the part

mounted to a 95mm × 76mm PCB with four layers.

JCbottom, the thermal resistance from junction to the

bottom of the product case, is determined with all

of the component power dissipation flowing through

the bottom of the package. In the typical Module,

the bulk of the heat flows out the bottom of the pack-

age, but there is always heat flow out into the ambi-

ent environment. As a result, this thermal resistance

value may be useful for comparing packages but

the test conditions don’t generally match the user’s

application.

JCtop, the thermal resistance from junction to top of

the product case, is determined with nearly all of the

component power dissipation flowing through the top

of the package. As the electrical connections of the

typical Module are on the bottom of the package, it

is rare for an application to operate such that most of

the heat flows from the junction to the top of the part.

As in the case of JCbottom, this value may be useful

for comparing packages but the test conditions don’t

generally match the user’s application.

JB, the thermal resistance from junction to the

printed circuit board, is the junction-to-board thermal

resistance where almost all of the heat flows through

the bottom of the Module and into the board, and

is really the sum of the JCbottom and the thermal

resistance of the bottom of the part through the solder

joints and through a portion of the board. The board

temperature is measured a specified distance from

the package.

A graphical representation of the aforementioned ther-

mal resistances is given in Figure 8; blue resistances are

contained within the Module regulator, whereas green

resistances are external to the Module package.

As a practical matter, it should be clear to the reader that

no individual or sub-group of the four thermal resistance

parameters defined by JESD51-12 or provided in the Pin

Configuration section replicates or conveys normal oper-

ating conditions of a Module regulator. For example, in

normal board-mounted applications, never does 100%

of the device’s total power loss (heat) thermally conduct

exclusively through the top or exclusively through bot-

tom of the Module package—as the standard defines

APPLICATIONS INFORMATION

Figure 8. Graphical Representation of JESD51-12 Thermal Coefficients

4646 F08

µMODULE DEVICE

JUNCTION-TO-CASE (TOP)

RESISTANCE

JUNCTION-TO-BOARD RESISTANCE

JUNCTION-TO-AMBIENT THERMAL RESISTANCE COMPONENTS

CASE (TOP)-TO-AMBIENT

RESISTANCE

BOARD-TO-AMBIENT

RESISTANCE

JUNCTION-TO-CASE

(BOTTOM) RESISTANCE

JUNCTION

AMBIENT

CASE (BOTTOM)-TO-BOARD

RESISTANCE

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