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LTC6951 датащи(PDF) 5 Page - Linear Technology |
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LTC6951 датащи(HTML) 5 Page - Linear Technology |
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5 / 6 page ![]() 5 dc2226Afa DEMO MANUAL DC2226A Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. HARDWARE SETUP DC2226A Power Connections E14: +6V Power Input. Connect to a low-noise supply set to a current limit of 2A. E12: +3V Power Input. Connect to a low-noise supply set to a current limit of 2A. E1, E9: GND - Ground connections for power supplies. E5, E8: 1.8V test points. Measure 1.8V supply voltages at these points. (Measurement only, do not apply power.) E4, E6, E11: 3V3_1, 3V3_2, 3V3_3 test points. Measure 3.3V supply voltages at these points. (Measurement only, do not apply power.) E7, E13: 5V_1, 5V_2 test points. Measure 5V supply voltages at these points. (Measurement only, do not ap- ply power.) DC2226A Signal Connections J2, J3: Analog inputs for U1, 50Ω impedance. Maximum signal level is 1.5VP-P. J4, J5: Analog inputs for U3, 50Ω impedance. Maximum signal level is 1.5VP-P. J1:ExternalReferenceClockInput.Notconnected,requires component changes, refer to schematic. J6: FMC HPC interface to FPGA carrier board. APPENDIX A Xilinx KC705 Based Evaluation System The DC2226A system consists of the DC2226A itself, a Xilinx KC705 FPGA evaluation board, a DC2159 USB communication board, and a host PC running the various test programs. Complete systems that ship from Linear Technology will have the KC705 board configured to automatically load the default FPGA image for DC2226A from the onboard configuration EEPROM. The procedure for bringing up the system is as follows: 1) Iftheboardswereobtainedseparately,assemblethem as shown in Figure 1 (FMC connectors are fragile, make sure they are properly aligned before seating.) 2) Connect power supply to the KC705 board and turn on the power switch. If the assembled system was obtained from Linear Technology, the FPGA bitstream willloadautomaticallyfromtheonboardconfiguration memory. 3) Boards not obtained from Linear Technology will need to be configured as described in the Alternate FPGA Configuration section. 4) Apply power and analog input signals to the DC2226A board. 5) Verify that PScope software is installed. Connect DC2159 to the host PC with a USB-mini cable. Driver installation will start automatically and PScope will recognize the system when installation finishes. Quit PScope and run Matlab/Python test scripts. Note: Power must be applied to the KC705 board when the USB cable is connected or the driver installation will not complete properly. Alternate FPGA Configuration KC705 boards not obtained from Linear Technology will need to be configured via JTAG. FPGA images are located in the PScope installation directory in the FPGA_images folder. Connect a USB micro cable to the JTAG USB con- nector on the KC705 board and use a Xilinx tool such as Impact or Vivado Lab Edition to load the bitfile. Once the FPGA is configured, remove the USB cable and exit the software. (The onboard JTAG adapter and the DC2159 USB communication board use the same USB controller and they may interfere with one another.) |
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