LTC2972 datasheet(16/112 Pages) LINER

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LTC2972

2972fa

For more information www.linear.com/LTC2972

PIN FUNCTIONS

PIN NAME

PIN NUMBER

PIN TYPE

DESCRIPTION

VSENSEP0

32*

DC/DC Converter Differential (+) Output Voltage-0 Sensing Pin

VSENSEM0

33*

DC/DC Converter Differential (–) Output Voltage-0 Sensing Pin

VOUT_EN0

Out

DC/DC Converter Enable-0 Pin.

VOUT_EN1

Out

DC/DC Converter Enable-1 Pin.

AUXFAULTB

Out

Auxiliary Fault Output Pin. Can Be Configured to Pull Low When OV/UV Detected

DNC

Do Not Connect Do Not Connect to this Pin

VIN_SNS

VIN SENSE Input. This Voltage is Compared Against the VIN On and Off Voltage Thresholds In Order

to Determine When to Enable and Disable, Respectively, the Downstream DC/DC Converters

VPWR

VPWR Serves as the Unregulated Power Supply Input to the Chip (4.5 to 15V). If a 4.5V to 15V

Supply Voltage Is Unavailable, Short VPWR to VDD33 and Power the Chip Directly from a 3.3V Supply.

Bypass to GND with 0.1µF Capacitor

VDD33

In/Out

If Shorted to VPWR, It Serves as 3.13 to 3.47V Supply Input Pin. Otherwise It Is a 3.3V Internally

Regulated Voltage Output (Use 0.1µF Decoupling Capacitor to GND). If using the internal regulator

to provide VDD33, do not connect to VDD33 pins of any other devices

VDD33

Input for Internal 2.5V Sub-Regulator. Short this Pin to Pin 6. If using the internal regulator to

provide VDD33, do not connect to VDD33 pins of any other devices

VDD25

In/Out

2.5V Internally Regulated Voltage Output. Bypass to GND with a 0.1µF Capacitor. Do not connect to

VDD25 pins of any other devices

VDD25

2.5V Supply Voltage Input. Short this Pin to Pin 8. Do not connect to VDD25 pins of any other devices

TSENSE0

10*

In/Out

External Temperature Current Output and Voltage Input for Channel 0. Maximum allowed

capacitance is 1µF

TSENSE1

11*

In/Out

External Temperature Current Output and Voltage Input for Channel 1. Maximum allowed

capacitance is 1µF

PWRGD

Out

Power-Good Open Drain Output. Indicates When Selected Outputs Are Power Good. Can be Used as

System Power-On Reset

SHARE_CLK

In/Out

Bidirectional Clock Sharing Pin. Connect a 5.49kΩ Pull-Up Resistor to VDD33. Connect to all other

SHARE_CLK pins in the system

PG0

In/Out

Configurable Open-Drain Output and Digital Input for Channel 0. Connect a 10kΩ Pull-Up Resistor

to VDDIO.

PG1

In/Out

Configurable Open-Drain Output and Digital Input for Channel 1. Connect a 10kΩ Pull-Up Resistor

to VDDIO

WDI/RESETB

Watchdog Timer Interrupt and Chip Reset Input. Connect a 10kΩ Pull-Up Resistor to VDD33. Rising

Edge Resets Watchdog Counter. Holding this Pin Low for More than tRESETB Resets the Chip

FAULTB0

In/Out

Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-0. Connect a 10kΩ

Pull-Up Resistor to VDDIO

FAULTB1

In/Out

Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-1. Connect a 10kΩ

Pull-Up Resistor to VDDIO

Digital Input. Write-Protect Input Pin, Active High

SDA

In/Out

PMBus Bidirectional Serial Data Pin

SCL

PMBus Serial Clock Input Pin (400kHz Maximum)

ALERTB

Out

Open-Drain Output. Generates an Interrupt Request in a Fault/Warning Situation

CONTROL0

Control Pin 0 Input

CONTROL1

Control Pin 1 Input

VDDIO

Sets the Input Threshold of all Digital inputs, except SHARE_CLK, ASEL[1:0], VOUT_EN[1:0] and

AUX_FAULTB, to approximately 45% of VDDIO. Connect to a supply voltage between 1.5V and 3.6V.

Connect all of the LTC2972 pins pull-up resistors to this pin except WDI/RESETB, SHARE_CLK and

VOUT_EN[1:0]. Connect these pins pull-up resistors to VDD33

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