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LT8613 датащи(PDF) 9 Page - Linear Technology |
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LT8613 датащи(HTML) 9 Page - Linear Technology |
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9 / 24 page ![]() For more information www.linear.com/LT8613 LT8613 9 8613f pin FuncTions SYNC (Pin 1): External Clock Synchronization Input. Ground this pin for low ripple Burst Mode operation at low output loads. Tie to a clock source for synchronization to an external frequency. Apply a DC voltage of 3V or higher or tie to INTVCC for pulse-skipping mode. When in pulse- skipping mode, the IQ will increase to several hundred µA. When SYNC is DC high or synchronized, frequency foldback will be disabled. Do not float this pin. TR/SS (Pin 2): Output Tracking and Soft-Start Pin. This pin allows user control of output voltage ramp rate during start-up. A TR/SS voltage below 0.97V forces the LT8613 to regulate the FB pin to equal the TR/SS pin voltage. When TR/SS is above 0.97V, the tracking function is disabled and the internal reference resumes control of the error amplifier. An internal 2.2μA pull-up current from INTVCC on this pin allows a capacitor to program output voltage slewrate.Thispinispulledtogroundwithaninternal230Ω MOSFETduringshutdownandfaultconditions;useaseries resistor if driving from a low impedance output. This pin may be left floating if the tracking function is not needed. RT (Pin 3): A resistor is tied between RT and ground to set the switching frequency. EN/UV (Pin 4): The LT8613 is shut down when this pin is low and active when this pin is high. The hysteretic threshold voltage is 1.00V going up and 0.96V going down. Tie to VIN if the shutdown feature is not used. An external resistor divider from VIN can be used to program a VIN threshold below which the LT8613 will shut down. VIN(Pins5,6,7):TheVINpinssupplycurrenttotheLT8613 internal circuitry and to the internal topside power switch. These pins must be tied together and be locally bypassed. Be sure to place the positive terminal of the input capaci- tor as close as possible to the VIN pins, and the negative capacitor terminal as close as possible to the PGND pins. PGND (Pins 8, 9, 10): Power Switch Ground. These pins arethereturnpathoftheinternalbottom-sidepowerswitch and must be tied together. Place the negative terminal of the input capacitor as close to the PGND pins as possible. GND (Pins 11, 12, 13, 14): It is recommended that these be connected to GND so that the exposed pad GND can be run to the top level GND copper to enhance thermal performance. SW (Pins 15–19): The SW pins are the outputs of the internal power switches. Tie these pins together and con- nect them to the inductor and boost capacitor. This node should be kept small on the PCB for good performance. BST (Pin 20): This pin is used to provide a drive voltage, higher than the input voltage, to the topside power switch. Placea0.1µFboostcapacitorascloseaspossibletotheIC. INTVCC (Pin 21): Internal 3.4V Regulator Bypass Pin. The internal power drivers and control circuits are pow- ered from this voltage. INTVCC maximum output cur- rent is 20mA. Do not load the INTVCC pin with external circuitry. INTVCC current will be supplied from BIAS if VBIAS > 3.1V, otherwise current will be drawn from VIN. Voltage on INTVCC will vary between 2.8V and 3.4V when VBIASisbetween3.0Vand3.6V.Decouplethispintopower ground with at least a 1μF low ESR ceramic capacitor placed close to the IC. BIAS(Pin22):Theinternalregulatorwilldrawcurrentfrom BIAS instead of VIN when BIAS is tied to a voltage higher than 3.1V. For output voltages of 3.3V and above this pin should be tied to VOUT. If this pin is tied to a supply other than VOUT use a 1µF local bypass capacitor on this pin. PG (Pin 23): The PG pin is the open-drain output of an internal comparator. PG remains low until the FB pin is within ±9% of the final regulation voltage, and there are no fault conditions. PG is valid when VIN is above 3.4V, regardless of EN/UV pin state. FB (Pin 24): The LT8613 regulates the FB pin to 0.970V. Connect the feedback resistor divider tap to this pin. Also, connect a phase lead capacitor between FB and VOUT. Typically, this capacitor is 4.7pF to 10pF. ISP (Pin 25): Current Sense (+) Pin. This is the noninvert- ing input to the current sense amplifier. |
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