LT8331 datasheet(8/30 Pages) LINER

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LT8331

8331fa

For more information www.linear.com/LT8331

OPERATION

The LT8331 uses a fixed frequency, current mode control

scheme to provide excellent line and load regulation.

Operation can be best understood by referring to the

BlockDiagram.Anoscillator(withfrequencyprogrammed

by a resistor at the RT pin) turns on the internal power

switch at the beginning of each clock cycle. Current in

the inductor then increases until the current comparator

trips and turns off the power switch. The peak inductor

current at which the switch turns off is controlled by

the voltage on the internal VC node. The error amplifier

servos the VC node by comparing the voltage on the

FBX pin with an internal reference voltage (1.60V or

–0.80V, depending on the chosen topology). When the

load current increases it causes a reduction in the FBX

pin voltage relative to the internal reference. This causes

the error amplifier to increase the VC voltage until the

new load current is satisfied. In this manner, the error

amplifier sets the correct peak switch current level to

keep the output in regulation.

The LT8331 is capable of generating either a positive or

negative output voltage with a single FBX pin. It can be

configuredasaboost,SEPICorflybackconvertertogener-

ate a positive output voltage, or as an inverting converter

to generate a negative output voltage. When configured

as a SEPIC converter, as shown in the Block Diagram, the

FBX pin is pulled up to the internal bias voltage of 1.60V

by a voltage divider (R1 and R2) connected from VOUT

to GND. Amplifier A2 becomes inactive and amplifier A1

performs (inverting) amplification from FBX to VC. When

the LT8331 is in an inverting configuration, the FBX pin

is pulled down to –0.80V by a voltage divider from VOUT

to GND. Amplifier A1 becomes inactive and amplifier A2

performs (non-inverting) amplification from FBX to VC.

If the EN/UVLO pin voltage is below 1.6V, the LT8331

enters undervoltage lockout (UVLO), and stops switching.

When the EN/UVLO pin voltage is above 1.74V (typical),

theLT8331resumesswitching.IftheEN/UVLOpinvoltage

is below 0.2V, the LT8331 draws less than 1µA from VIN.

For the SYNC/MODE pin tied to ground, the LT8331 pro-

vides low output ripple Burst Mode operation with ultra

low quiescent current at light loads. For the SYNC/MODE

pin tied to INTVCC, the LT8331 uses pulse-skipping mode,

at the expense of hundreds of microamps, to maintain

output voltage regulation at light loads by skipping switch

pulses. For the SYNC/MODE pin driven by an external

clock, the converter switching frequency is synchronized

to that clock and pulse-skipping mode is also enabled.

TheLT8331includesaBIASpintoimproveefficiencyacross

all loads. The INTVCC supply current can be drawn from

the BIAS pin instead of the VIN pin for 4.4V ≤ BIAS ≤ VIN.

Protection features ensure the immediate disable of

switching and reset of the SS pin for any of the following

faults: internal reference UVLO, INTVCC UVLO, switch cur-

rent > 1.9× maximum limit, EN/UVLO < 1.6V or junction

temperature > 170°C.

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