MP3332

MP3332 Rev. 1.0

www.MonolithicPower.com

20

5/1/2018

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Table 4: Peak Current Setting Register

Addr: 0x02

Bit

Bit Name

Access

Default

Description

7:5

NTC_WD

RW

000

NTC detection window.

000 = disabled

001 = 0.6V; 010 = 0.67V; 011 = 0.74V; 111 = 1.02V;

0.07V/step

4:3

IL_PEAK

RW

01

Inductor current limit setting bits.

00 = 2A, 01 = 2.5A, 10 = 3.5A, 11 = 4.5A

2

FS_SD

RW

0

Disable the switching frequency stretching down from

1MHz if VIN is close to VOUT.

0 = enable Fsw stretch-down function

1 = disable Fsw stretch-down function

1

BAL_ON

RW

0

LED load balance enable bit.

0 = LED voltage mismatch auto-balance disabled

1 = LED voltage mismatch auto-balance enabled

0

NA

RW

NA

Reserved

Table 5: Flash Timer Setting Register

Addr: 0x03

Bit

Bit Name

Access

Default

Description

7:4

FL_TIM

RW

0001

Flash timer setting bits. 50ms to 800ms, 50ms/step.

0000 = 50ms; 0001 = 100ms; 1111 = 800ms

3

LED_SD

RW

0

LED_MOD and LED1/2_EN resetting control bit.

0 = reset LED_MOD and LED1/2_EN to default value

after flash or torch

1 = no reset

2

LEDT_SD

RW

0

LED_MOD and LED1/2_EN resetting control bit when an

NTC fault occurs.

0 = no reset and device continues

1 = reset and device stops

1:0

SW_FS

RW

00

Switching frequency setting bits.

00 = 4MHz; 01 = 3MHz; 10 = 2MHz; 11 = 1MHz