MP3332

MP3332 Rev. 1.0

www.MonolithicPower.com

17

5/1/2018

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NTC Detection

If the register NTC_WD is set to enable NTC

detection, the NTC sources a constant 35µA

current. Connect the negative temperature

coefficient (NTC) resistor between NTC and

GND (see Figure 16). If the voltage across the

threshold set by NTC_WD, the internal fault bit

FT_LEDHOT is set to 1, and the modes are

reset to standby mode if LEDT_SD = 1. If

LEDT_SD = 0, the mode setting is not reset

after the fault bit is set. The fault bit remains

until it is read back, or the power is reset. Float

NTC when the protection mode is not needed.

NTC

DEC

Figure 16: NTC Detection

VOUT-GND Short Protection

If VOUT < 1V, the device stops switching and

disconnects the synchronous PMOS to avoid

drawing excessive current from the battery. Set

the FT_VOSC bit to 1 and reset the mode

setting. The fault bit remains until it is read back,

or the power is reset.

LED1/2-GND Short Protection

If VLED1 < 1V and ILED1 > 5mA, or VLED2 <

1V and ILED2 > 5mA, the IC marks off the

current source and sets the fault bit FT_LEDSC

to 1, but continues switching. If both current

sources are marked off, the device stops

switching, and the mode setting is reset. The

fault bit FT_LEDSC is 1 until it is read back, or

the power is reset. If LED_EN1/2 is set to 0, the

feedback of the current source 1/2 is not

involved in the loop control, and the fault

detection on this channel is disabled.

LED1/2 Open Protection

If VOUT-VLED1/2 < 100mV and VOUT > 5.5V,

the fault current source is marked off, and the

fault bit FT_OVP is set to 1, but continues

switching. If both current sources are marked

off, the device stops switching, and the mode

setting is reset. The fault bit FT_OVP is 1 until it

is

read

back, or

the power

is

reset.

If

LED_EN1/2 is set to 0, the feedback of the

current source 1/2 is not involved in the loop

control, and the fault detection on this channel

is disabled.

Output Over-Voltage Protection (OVP)

If VOUT > 5.5V, the device stops switching and

resumes normal operation when VOUT drops

below 5.2V. The fault bit FT_OVP is 1 until it is

read back, or the power is reset.

Junction Over-Temperature Protection (OTP)

If Tj > 130°C, the flash current drops to the

current set by I_TX if LED_OTAD = 1, and the

fault bit FT_OTP is set. If Tj > 1°C, the device

stops switching and resets the mode setting.

The fault bit FT_OTP must be cleared to 0 by a

read-back or power reset before restarting.

Time-Out Protection

If the device works in flash mode with hardware

and

level

trigger

enabled,

the

time-out

protection is triggered when the STR pulse is

longer than the time set by FL_TIM. The device

stops switching and resets the mode setting bits

when LED_SD = 0, and the fault bit FT_TO is 1

until it is read back, or the power is reset.

Under-Voltage Lockout (UVLO) Protection

If VIN drops below the UVLO threshold, the

device stops and all of the registers are reset to

default.

master sends a seven-bit address followed by

an eighth read (Read: 1) or write (Write: 0) bit.

The following bit indicates the register address

to or from which the data is read or written.

0

1

1

1

0

1

R/W

1