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HF01B00 датащи(PDF) 11 Page - Monolithic Power Systems

номер детали HF01B00
подробное описание детали  Off Line High Voltage Quasi Resonant Regulator
PDF  16 Pages
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производитель  MPS [Monolithic Power Systems]
домашняя страница  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

HF01B00 датащи(HTML) 11 Page - Monolithic Power Systems

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HF01B00/01/02/03/04
–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
HF01B00/01/02/03/04 Rev. 1.2
www.MonolithicPower.com
11
4/9/2013
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
Where, VOVP is the output voltage when OVP
happens; NS is the turns of secondary winding of
the transformer; NA is the turns of the auxiliary
winding.
The plateau voltage of the auxiliary winding is
sampled at the VSD pin with a 3.5us delay after
the turn-off sequence. Otherwise, the ringing
cause by transformer leakage inductance may
unintentional trigger the OVP.
3.5us
OVP Sample
VAUX
Figure 9
—OVP Sample Delay
Over Load Protection (OLP)
In a flyback converter, the maximum output
power is limited by the maximum switching
frequency and primary peak current. If the load
consumes more than the maximum output power,
output voltage will drop below the set point. This
reduces the current through the optocoupler LED
by the negative feedback control loop, and thus
FB voltage goes up.
The voltage at the FB Pin is continuously
monitored. When the feedback voltage exceeds
the VOLP threshold—3.7V, the IC stops switching
and enters a safe low-power operating mode that
prevents from any lethal thermal or stress
damage. As soon as the fault disappears, the IC
resumes switching. Thus the circuit operates in a
burst manner, called auto-recovery. During fault
condition, the VCC UVLO lower threshold drops
down from 8V to 5.5V.
During the start-up phase or load transient, the
FB voltage stays high enough temporarily to
mis-trigger the OLP, to prevent this undesired
protection, OLP circuit is designed to be triggered
after Vcc is decreased below 8.5V.
Burst Operation
To minimize stand-by power consumption, the
HF01B00/01/02/03/04 implement burst mode at
no load or light load. As the load decreases, the
FB voltage decreases. The IC stops switching
when the FB voltage drops below the lower
threshold VBRUL—0.5V. Then the output voltage
starts to drop at a rate dependent on the load.
This causes the FB voltage to rise again due to
the negative feedback control loop. Once the FB
voltage exceeds the upper threshold VBRUH—0.7V,
switching pulse resumes. The FB voltage then
decreases and the whole process repeats. Burst-
mode operation alternately enables and disables
the switching pulse of the MOSFET. Hence
switching loss at no load or light load conditions
is greatly reduced.
Figure 10 shows the burst mode operation of
HF01B00/01/02/03/04
VFB
VDS
0.7V
0.5V
Figure 10
—Burst Mode Operation
Thermal shutdown (TSD)
To prevents from any lethal thermal damage, the
HF01B00/01/02/03/04
shuts
down
switching
cycle when the junction temperature exceeds
150 ℃ . As soon as the junction temperature
drops below 110℃, the power supply resumes
operation. During OTP, the lower threshold of the
VCC UVLO drops from 8V to 5.5V



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