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MP3910 датащи(PDF) 13 Page - Monolithic Power Systems |
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MP3910 датащи(HTML) 13 Page - Monolithic Power Systems |
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13 / 23 page ![]() MP3910 –PEAK CURRENT MODE BOOST CONTROLLER MP3910 Rev. 1.11 www.MonolithicPower.com 13 11/6/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. pin to 3.6V source with 14.4kΩ resistor, the feedback signal can be connected to COMP pin directly. If the detection voltage is lower than 185mV, MP3910 will enable the internal error amplifier but turn off the pull up resistor. Then COMP pin is just one output pin of error amplifier and the feedback signal should be connected to FB pin. GATE I SENSE R SENSE VIN Start up 50µs + - 0.185V R MODE V SENSE = 55µA x(RMODE+R SENSE) 55µA High / Low Figure 2: Feedback Mode Setting Generally, it is recommended to place one resistor with 5Kohm~10Kohm between ISENSE pin and current sense resistor for the feedback mode through directly COMP pin, and connect ISENSE pin to current sense resistor directly for feedback mode through FB pin. Soft-Start MP3910 uses one external capacitor on SS pin to control COMP voltage rising for soft-start. When the chip starts, the capacitor on SS pin is charged by one 54uA current source at a slow pace set by the capacitance. When the SS voltage is lower than the external COMP voltage, SS overrides the COMP signal so the PWM comparator uses SS instead of COMP as the PWM turn off reference. When SS is higher than COMP voltage, COMP gains the control back and the soft start finishes. The soft-start can reduce voltage stresses and surge currents during start up, also prevent the converter output voltage from overshooting during startup. Soft start occurs during the start up time and protection recovery time after OLP, SCP and OVP. During normal condition, the SS voltage is clamped at 3.65V. Programmable Oscillator The MP3910 oscillating frequency is set by an external resistor from the RT pin to ground. The value of RT can be estimated from: 3 2.35 10 T SW R f RT is in kΩ and fSW is in kHz. The frequency setting resistor value shouldn’t be too large for noise immunity consideration. It is recommended to set the frequency within 30kHz to 400kHz. Enable/SYNC Control EN/SYNC is a digital control pin that turns MP3910 on and off. Drive EN high to turn on the controller; drive it low to turn it off. An internal 1MΩ resistor from EN/SYNC to GND allows EN/SYNC to be floated to shut down the chip. For external clock synchronization, connect a clock with a frequency higher than RT set frequency and between 80kHz to 400kHz, the internal clock rising edge will synchronize with the external clock rising edge. Select an external clock pulse signal with low level width less than 10μs, or else MP3910 may treat it as EN power off. EN/SYNC pin can not be connected to voltage higher than 6V, when voltage source is higher than 6V, a pull up resistor is recommend. For resistor pull up condition, an internal zener diode clamps the voltage at EN/SYNC pin. The maximum pull-up current for the internal clamp zener (assuming clamped at 6V) should be less than 0.4mA. Typically 100k pull up resistor is recommended. There is no problem if the clamp voltage is distributed at higher than 6V if pull up current is less than 0.4mA. Current Sense and Over Current Protection The MP3910 is peak current mode controller. The current through the external FET can be sensed through a sensing resistor used in series with the source terminal of FET. The sensed voltage on ISENSE pin is then amplified and fed to the high speed current comparator for the current mode control purpose. The current comparator takes this sensed voltage (plus slope compensation) as one of its inputs, then compares the power switch current with the COMP voltage. When the amplified current |
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