MP8869WGL datasheet(20/41 Pages) MPS

20 / 41 page

MP8869W

– 3V - 18V, 12A, SYNCHRONOUS STEP-DOWN CONVERTER

MP8869W Rev. 1.02

www.MonolithicPower.com

1/18/2018

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

Figure 4: Forced PWM Operation

Light-Load Operation

When the MP8869W works in auto PFM/PWM

mode or light-load operation, the MP8869W

reduces the switching frequency automatically to

maintain high efficiency, and the inductor current

drops almost to zero. When the inductor current

reaches zero, the LS-FET driver goes into tri-

state (high-Z) (see Figure 5). The output

capacitors discharge slowly to GND through R1

and

R2.

This

operation

improves

device

efficiency greatly when the output current is low.

VEAO

VOUT

VIN

Ton is constant

VSW

VRAMP

IOUT

Current Modulator Time

Figure 5: Light-Load Operation

Light-load operation is also called skip mode

because the HS-FET does not turn on as

frequently during heavy-load condition. The

frequency at which the HS-FET turns on is a

function of the output current. As the output

current increases, the time period that the

current modulator regulates becomes shorter,

the HS-FET turns on more frequently, and the

switching frequency increases. The output current

reaches

critical

levels

when

the

current

modulator time is zero and can be determined

with Equation (1):

OUT

) V

2 L F





 



(1)

The device reverts to PWM mode once the

output

current

exceeds

the

critical

level.

Afterward, the switching frequency remains fairly

constant over the output current range.

The MP8869W can operate in pulse frequency

modulation (PFM) mode under light load to

improve

efficiency

(low-power

mode).

The

MP8869W can also operate in forced PWM

mode at any load condition. This mode is

selectable through the I2C control. To enable

low-power mode, set the Mode bit to 0. To

disable low-power mode, set the mode bit to 1,

and the converter will work in forced PWM mode.

The Mode bit is set to 0 (PFM) by default.

Operating without an External Ramp

The traditional constant-on-time control scheme

is unstable intrinsically if t

he output capacitor’s

ESR is not large enough to be an effective

current-sense

resistor.

Ceramic

capacitors

cannot be used as output capacitors, usually.

The MP8869W has built-in, internal ramp

compensation to ensure that the system is stable,

even without

the help of the output capacitor’s

ESR. The pure ceramic capacitor solution can

reduce the output ripple, total BOM cost, and

board area significantly.

VCC Regulator

A 3.5V internal regulator powers most of the

internal circuitries. A 470nF decoupling capacitor

is needed to stabilize the regulator and reduce

ripple. This regulator takes the VIN input and

operates in the full VIN range. After EN is pulled

high, and VIN is greater than 3.5V, the output of

the regulator is in full regulation. When VIN is

lower than 3.5V, the output voltage decreases

and follows the input voltage.

A 0.47μF ceramic

capacitor is required for decoupling.

Error Amplifier (EA)

The error amplifier (EA) compares the FB

voltage against the internal 0.6V reference

(REF) for non-I2C mode and outputs a PWM

modulation signal. In I2C mode, FB is opened,

and VOUT is connected to the EA non-inverter

input. The reference voltage can be programmed

from 0.6V to 1.55V in the I2C control loop. The

optimized

internal

ramp

compensation

minimizes the external component count and

simplifies the control loop design.

Enable (EN)

EN is a digital control pin that turns the

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