Document Number: 002-01122 Rev.*L

Page 40 of 59

S29AS016J

After the sector erase command sequence is written, the system should read the status on DQ7 (Data# Polling) or DQ6 (Toggle Bit

I) to ensure the device has accepted the command sequence, and then read DQ3. If DQ3 is 1, the internally controlled erase cycle

has begun; all further commands (other than Erase Suspend) are ignored until the erase operation is complete. If DQ3 is 0, the

device will accept additional sector erase commands. To ensure the command has been accepted, the system software should

check the status of DQ3 prior to and following each subsequent sector erase command. If DQ3 is high on the second status check,

the last command might not have been accepted. Table shows the outputs for DQ3.

Notes

1. DQ5 switches to 1 when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. See DQ5: Exceeded Timing Limits

on page 39 for more information.

2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details.

Write Operation Status

Operation

DQ7

(Note 2)

DQ6

DQ5

(Note 1)

DQ3

DQ2

(Note 2)

RY/BY#

Standard

Mode

Embedded Program Algorithm

DQ7#

Toggle

0

N/A

No toggle

0

Embedded Erase Algorithm

0

Toggle

0

1

Toggle

0

Erase

Suspend

Mode

Reading within Erase

Suspended Sector

1

No toggle

0

N/A

Toggle

1

Reading within Non-Erase

Suspended Sector

Data

Data

Data

Data

Data

1

Erase-Suspend-Program

DQ7#

Toggle

0

N/A

N/A

0