5228-DS04-R datasheet(51/100 Pages) BOARDCOM

51 / 100 page

Data Sheet

BCM5228

7/12/04

Broa d c om Co rp o r a t i o n

Document

5228-DS09-405-R

MII Management Interface: Register Programming

Page 39

MII CONTROL REGISTER

Soft Reset. To reset the BCM5228 by software control, a 1 must be written to bit 15 of the Control register using an MII write

operation. The bit clears itself after the reset process is complete, and need not be cleared using a second MII write. Writes

to other Control register bits have no effect until the reset process is completed, which requires approximately 1

microsecond. Writing a 0 to this bit has no effect. Since this bit is self-clearing, after a few cycles from a write operation, it

returns a 0 when read.

Loopback. The BCM5228 can be placed into loopback mode by writing a 1 to bit 14 of the Control register. The loopback

mode can be cleared by writing a 0 to bit 14 of the Control register, or by resetting the chip. When this bit is read, it returns

a 1 when the chip is in software-controlled loopback mode, otherwise it returns a 0.

Forced Speed Selection. If auto-negotiation is enabled, this bit has no effect on the speed selection. However, if auto-

negotiation is disabled by software control, the operating speed of the BCM5228 can be forced by writing the appropriate

value to bit 13 of the Control register. Writing a 1 to this bit forces 100BASE-X operation, while writing a 0 forces 10BASE-

T operation. When this bit is read, it returns the value of the software-controlled forced speed selection only. In order to read

the overall state of forced speed selection, including both hardware and software control, use bit 2of the Auxiliary Error and

General Status register, 1Ch.

Auto-Negotiation Enable. Auto-negotiation can be disabled by one of two methods: hardware or software control. If the

ANEN input pin is driven to a logic 0, auto-negotiation is disabled by hardware control. If bit 12 of the Control register is

written with a value of 0, auto-negotiation is disabled by software control. When auto-negotiation is disabled in this manner,

writing a 1 to the same bit of the Control register or resetting the chip re-enables auto-negotiation. Writing to this bit has no

Table 19: MII Control Register (Address 00d, 00h)

Bit

Name

R/W

Description

Default

Soft Reset

R/W

(SC)

1 = PHY reset

0 = Normal operation

Loopback

R/W

1 = loopback mode

0 = Normal operation

Forced Speed Selection

R/W

1 = 100 Mbps

0 = 10 Mbps

Auto-Negotiation Enable

R/W

1 = Auto-negotiation enable

0 = Auto-negotiation disable

Power Down

0 = Normal operation

Isolate

R/W

1 = Electrically isolate PHY from RMII

0 = Normal operation

Restart Auto-Negotiation

R/W

(SC)

1 = Restart auto-negotiation process

0 = Normal operation

Duplex Mode

R/W

1 = Full-duplex

0 = Half-duplex

Reserveda

a. Preserve existing values of reserved bits by completing a “Read/Modify Write.”

––

6:0

Reserveda

––

Note: R/W = Read/Write, RO = Read Only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear

after read operation.

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