AD7294 datasheet(6/48 Pages) AD

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Data Sheet

AD7294

Rev. I | Page 5 of 47

SPECIFICATIONS

DAC SPECIFICATIONS

AVDD = DVDD = 4.5 V to 5.5 V, AGND = DGND = 0 V, internal 2.5 V reference; VDRIVE = 2.7 V to 5.5 V; TA =−40°C to +105°C, unless

otherwise noted. DAC OUTV+ AB and DAC OUTV+ CD = 4.5 V to 16.5 V, OFFSET IN x is floating, therefore, the DAC output

span = 0 V to 5 V.

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

ACCURACY

Resolution

Bits

Relative Accuracy (INL)

±1

±3

LSB

Differential Nonlinearity (DNL)

±0.3

±1

LSB

Guaranteed monotonic

Zero-Scale Error

2.5

Full-Scale Error of DAC and

Output Amplifier

15.51

DAC OUTV+ = 5.0 V

Full-Scale Error of DAC

DAC OUTV+ = 15.0 V

Offset Error

±8.575

Measured in the linear region, TA = −40°C to +105°C

±2

Measured in the linear region, TA = 25°C

Offset Error Temperature

Coefficient

±5

ppm/°C

Gain Error

±0.025

±0.155

% FSR

Gain Temperature Coefficient

±5

ppm/°C

DAC OUTPUT CHARACTERISTICS

Output Voltage Span

2 × VREF

0 V to 5 V for a 2.5 V reference

Output Voltage Offset

The output voltage span can be positioned in the 0 V to

15 V range; if the OFFSET IN x is left floating, the offset

pin = 2/3 × VREF , giving an output of 0 V to 2 × VREF

Offset Input Pin Range

VOUT = 3 VOFFSET − 2 × VREF + VDAC

DC Input Impedance2

kΩ

100 kΩ to VREF, and 200 kΩ to AGND, see Figure 48

Output Voltage Settling Time2

µs

1/4 to 3/4 change within 1/2 LSB, measured from last

SCL edge

Slew Rate2

1.1

V/µs

Short-Circuit Current2

Full-scale current shorted to ground

Load Current2

±10

Source and/or sink within 200 mV of supply

Capacitive Load Stability2

RL = ∞

DC Output Impedance2

Ω

REFERENCE

Reference Output Voltage

2.49

2.5

2.51

±0.4% maximum at 25°C, AVDD = DVDD = 4.5 V to 5.5 V

Reference Input Voltage Range

AVDD − 2

Input Current

100

125

µA

VREF = 2.5 V

Input Capacitance2

VREF Output Impedance2

Ω

Reference Temperature

Coefficient

ppm/°C

This value indicates that the DAC output amplifiers can output voltages 15.5 mV below the DAC OUTV+ supply. If higher DAC OUTV+ supply voltages are used, the

full-scale error of the DAC is typically 2 mV with no load.

Samples are tested during initial release to ensure compliance; they are not subject to production testing.

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