AD5590BBCZ datasheet(27/45 Pages) AD

27 / 45 page

AD5590

Rev. A | Page 26 of 44

THEORY OF OPERATION

The AD5590 is an analog I/O module. The output port contains

sixteen 12-bit voltage output DAC channels. The DAC channels

are divided into two groups of eight DACs, each of which can be

programmed independently. Each group of DACs contains its

own internal 2.5 V reference. The references are powered down

by default allowing the use of external references, if required.

Either internal reference can be powered up and used as a refer-

ence for the ADC section. This is achieved by connecting the

appropriate VREFINx/VREFOUTx pin to VREFA. Because the VREFINx/

VREFOUTx pins have different input and output impedances it is

not possible to use one internal reference for both DAC groups

without buffering.

The input port comprises a single, 12-bit, 1 MSPS ADC with

16 multiplexed input channels. The ADC contains a sequencer

that allows it to sample any combination of the sixteen channels.

The AD5590 also contains eight rail-to-rail low noise amplifiers.

These amplifiers can be used independently or as part of signal

condition for the input or output ports.

DAC SECTION

Sixteen DACs make up the output port of the AD5590. Each

DAC consists of a string of resistors followed by an output

buffer amplifier. The sixteen DACs are divided into two groups

of eight with each group having its own internal 2.5 V reference

with an internal gain of 2. Figure 52 shows a block diagram of

the DAC architecture.

DAC REGISTER

REF (+)

DACVDD

VOUTx

GND

REF (–)

RESISTOR

STRING

OUTPUT

AMPLIFIER

(GAIN = +2)

Figure 52. DAC Architecture

Because the input coding to the DAC is straight binary, the ideal

output voltage when using an external reference is given by

















REFIN

OUT

The ideal output voltage when using the internal reference is

given by

















REFOUT

OUT

where:

= decimal equivalent of the binary code that is loaded to the

DAC register (0 to 4095).

= 12.

Resistor String

The resistor string section is shown in Figure 53. It is simply

a string of resistors, each of Value R. The code loaded into

the DAC register determines at which node on the string the

voltage is tapped off to be fed into the output amplifier. The

voltage is tapped off by closing one of the switches connecting

the string to the amplifier. Because it is a string of resistors, it is

guaranteed monotonic.

TO OUTPUT

AMPLIFIER

Figure 53. Resistor String

DAC Internal Reference

The DAC section has two on-chip 2.5 V references with

an internal gain of 2, giving a full-scale output of 5 V. The

on-board reference is off at power-up, allowing the use of

an external reference. The internal references are enabled

via a write to the appropriate control register (see Table 11).

The internal references associated with each group of DACs

are available at the VREFIN1/VREFOUT1 and VREFIN2/VREFOUT2 pins. A

buffer is required if the reference output is used to drive external

loads. When using the internal reference, it is recommended

that a 100 nF capacitor be placed between the reference output

and DACGND for reference stability.

Individual channel power-down is not supported while using

the internal reference.

DAC Output Amplifier

The output buffer amplifier can generate rail-to-rail voltages on

its output, which gives an output range of 0 V to DACVDD. The

amplifier is capable of driving a load of 2 kΩ in parallel with

1000 pF to DACGND. The source and sink capabilities of the

output amplifier can be seen in Figure 13. The slew rate is

1.5 V/μs with a ¼ to ¾ scale settling time of 10 μs.

AD5590BBCZ датащи(PDF) 27 Page - Analog Devices

AD5590BBCZ датащи(HTML) 27 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

датащи скачать

ссылки URL