L9678P datasheet(120/203 Pages) STMICROELECTRONICS

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Deployment drivers

L9678P, L9678P-S

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DocID029274 Rev 3

The VRCM flags will be given in the LPDIAGSTAT register. The status of the VRCM flags

after FET test is latched and can be cleared upon either LPDIAGREQ or SYSDIAGREQ SPI

commands.

Loss of ground return diagnostics

This diagnostics is available during a squib measurement or a high side driver diagnostics.

This test is based on the voltage drop across the ground return, if the voltage drop exceeds

VSGopen, ground connection is considered as lost. Should the ground connection on the

squib driver circuit be missing, the bit related to the channel under test by the two above

diagnostics will be activated in the LP_GNDLOSS register. The flag is latched after a proper

filter time tSGopen and cleared upon read.

High side safing FET diagnostics

This test has to be issued during the Diag state of the power-up sequence (Figure 9). Safing

FET has to be switched on with the proper code in DSTEST bit field of the SYSDIAGREQ.

Therefore, when the command is received, the device activates VSF regulator to supply the

external safing FET controller. The user can measure the voltage levels of both the VSF

regulator and the SSxy nodes. If the safing FET is properly switched on, the voltage on

SSxy is regulated.

The measurement request is done via Diagnostic Control command (DIAGCTRLx), while

results are reported through ADCRESx bit fields, as shown in Table 11.

Deployment timer diagnostic

This test allows verifying the correct functionality and duration of the timers used to control

the deployment times. This test can be executed only when the IC is in the Diag state by

setting the appropriate code in the DSTEST field of the SYSDIAGREQ register. When the

test is launched, the IC sequentially triggers the activation of the deployment timers of the

various channels (each of them separated by 8ms idle time) and outputs the relevant

waveform to the ARM output discrete pin. See the sequence detail in Figure 27. The MCU

can therefore test the deployment times by measuring the duration of the high pulses sent

by the IC on the ARM pin. The deployment time configuration used during this test is the

latest one programmed in the DCRx registers. In case the test is run on a channel with no

DCRx deployment time previously configured, a default 8us high pulse is output on ARM for

the relevant channel.

L9678P датащи(PDF) 120 Page - STMicroelectronics