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AD5337ARM датащи(PDF) 17 Page - Analog Devices

номер детали AD5337ARM
подробное описание детали  2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs
PDF  24 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD5337ARM датащи(HTML) 17 Page - Analog Devices

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AD5337/AD5338/AD5339
Rev. A | Page 17 of 24
Multiple-DAC Read Back Sequence.
If the user attempts to read back data from more than one DAC
at a time, the part reads back the default, power-on reset
conditions, i.e., all 0s except for CLR, which is 1.
WRITE OPERATION
When writing to the AD5337/AD5338/AD5339 DACs, the user
must begin with an address byte (R/W = 0), after which the
DAC acknowledges that it is prepared to receive data by pulling
SDA low. This address byte is followed by the pointer byte,
which is also acknowledged by the DAC. Two bytes of data are
then written to the DAC, as shown in Figure 33. A stop
condition follows.
PD0
CLR
LDAC
D7
D6
D5
D4
PD1
LSB
MSB
8-BIT AD5337
PD0
CLR
LDAC
D9
D8
D7
D6
PD1
PD0
D11
D10
D9
D8
PD1
MOST SIGNIFICANT DATA BYTE
LSB
MSB
10-BIT AD5338
LSB
MSB
12-BIT AD5339
CLR
LDAC
LEAST SIGNIFICANT DATA BYTE
D3
D2
D1
D0
X
D5
D4
D3
D2
D1
D0
X
X
D7
D6
D5
D4
D3
D2
D1
D0
LSB
MSB
8-BIT AD5337
LSB
MSB
10-BIT AD5338
LSB
MSB
12-BIT AD5339
XX
X
Figure 32. Data Formats for Write and Read Back
MOST SIGNIFICANT DATA BYTE
LEAST SIGNIFICANT DATA BYTE
0
001
1
A0
R/W
XX
LSB
ACK
BY
AD533x
ACK
BY
AD533x
MSB
ADDRESS BYTE
START
CONDITION
BY
MASTER
SCL
SDA
SCL
SDA
MSB
LSB
MSB
LSB
ACK
BY
AD533x
ACK
BY
AD533x
STOP
CONDITION
BY
MASTER
POINTER BYTE
0
Figure 33. Write Sequence



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