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AD9260

Rev. C | Page 28 of 44

REFERENCE OPERATION

The AD9260 contains an on-board band gap reference and

internal reference buffer amplifier. The onboard reference

provides a pin-strappable option to generate either a 1 V or 2.5

V output. With the addition of two external resistors, the user

can generate reference voltages other than 1 V and 2.5 V.

Another alternative is to use an external reference for designs

requiring enhanced accuracy and/or drift performance. See

Table 12 for a summary of the pin-strapping options for the

AD9260 reference configurations. Note, the optimum noise and

distortion can only be achieved with a 2.5 V reference.

Figure 66 shows a simplified model of the internal voltage

reference of the AD9260. A pin-strappable reference amplifier

buffers a 1 V fixed reference. The output from the reference

amplifier, A1, appears on the VREF pin and must be decoupled

with 0.1 µF and 10 µF capacitor to REFCOM. The voltage on

the VREF pin determines the full-scale input span of the A/D.

This input span equals:

VREF

Span

Input

Scale

Full

= 6

The voltage appearing at the VREF pin, as well as the state of

the internal reference amplifier, A1, is determined by the

voltage appearing at the SENSE pin. The logic circuitry contains

two comparators that monitor the voltage at the SENSE pin.

The comparator with the lowest set point (approximately 0.3 V)

controls the position of the switch within the feedback path of

A1. If the SENSE pin is tied to REFCOM, the switch is

connected to the internal resistor network, thus providing a

VREF of 2.5 V. If the SENSE pin is tied to the VREF pin via a

short or resistor, the switch is connected to the SENSE pin. A

short will provide a VREF of 1.0 V while an external resistor

network will provide an alternative VREF SPAN between 1.0 V

and 2.5 V. The external resistor network, for example, may be

implemented as a resistor divider circuit. This divider circuit

could consist of a resistor (R1) connected between VREF and

SENSE and another resistor (R2) connected between SENSE

and REFCOM. The other comparator controls internal circuitry

that will disable the reference amplifier if the SENSE pin is tied

to AVDD. Disabling the reference amplifier allows the VREF

pin to be driven by an external voltage reference.

LOGIC

– +

AD9260

DISABLE

TO A/D

Ω

6.25k

Ω

6.25k

Ω

DISABLE

7.5k

Ω

CAPT

CAPB

VREF

SENSE

REFCOM

Figure 66. Simplified Reference

The reference buffer circuit level shifts the reference to an

appropriate common-mode voltage for use by the internal

circuitry. The on-chip buffer provides the low impedance

necessary for driving the internal switched capacitor circuits

and eliminates the need for an external buffer op amp.

Table 12. Reference Configuration Summary

Reference

Operating Mode

Input Span (VINA–VINB)

(V p-p)

Required VREF (V)

Connect

INTERNAL

1.6

SENSE

VREF

INTERNAL

4.0

2.5

SENSE

REFCOM

INTERNAL

1.6 ≤ SPAN ≤ 4.0 and

1 ≤ VREF ≤ 2.5 and

VREF and SENSE

SPAN = 1.6 × VREF

VREF = (1+R1/R2)

SENSE and REFCOM

EXTERNAL

1.6 ≤ SPAN ≤4.0

1 ≤ VREF ≤2.5

SENSE

AVDD

VREF

EXT. REF.

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