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STV3550

7.9

IrDA Encoder/Decoder

The IrDA Encoder/Decoder performs the modulation/demodulation used to both encode and

decode the electrical pulses sent between the IR Transceiver and the UART. The block contains the

following machines which derive their timing from the system clock and the enable signal

(16X_UART_CLK):

●

Serial IR Encoder

●

Serial IR Decoder

The Encode block is driven by the negative edge triggered I_UARTF_TXD signal from the UART.

This initiates the modulation state machine resulting in the 3/16 modulated O_TXD signal which

drives the IR Transceiver module.

7.9.1

Encoding Scheme

The Encoder sends a pulse for every space or ‘0’ that is sent on the I_UARTF_TXD line. On a high

to low transition of the I_UARTF_TXD line, the generation of the pulse is delayed for 7 cycles of the

I_16XUARTF_CLK line before the pulse is set high for 3 cycles of the I_16XUARTF_CLK line (or 3/

16 of a bit time) and subsequently pulled low. The Encoding scheme is described in Figure 77.

7.9.2

Decoding Scheme

A high to low transition of the I_RXD line from the IR Transceiver signifies a 3/16 pulse. This pulse

is stretched to accommodate 1 bit time (16 I_16XUARTF_CLK clock cycles). Every pulse that is

received is translated into a ‘0’ or space on the O_UARTF_RXD line equal to 1 bit time. The

maximum value is 80% of the minimum bit time. The Decoding scheme is described in Figure 78.

Figure 76: IrDA Block Diagram

IrDA Encode

IrDA Decode

O_TXD

I_RXD

I_UARTF_TXD

O_UARTF_RXD

I_16XUARTF_CLK

I_IRDA_ON

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