SPEC-1081 (REV. 2)

8/15

29-09-2017

SA4101A

The feedback loops from the outputs of the amplifiers AI and

AV generate virtual shorts on the signal inputs. Exact

duplications of the input currents are generated for the analog

signal processing circuitry.

The current and voltage sense inputs are both identical. Both

inputs are differential current driven up to ±25μA peak. One

input of the voltage sense amplifier is internally connected to

AGND. This is possible because the voltage sense input is

much less sensitive to externally induced parasitic signals

compared to the current sense inputs.

Power Consumption

The power consumption of the SA4101A integrated circuit is

less than 25mW.

INPUT SIGNALS

Voltage Reference (VREF)

A bias resistor of 47k

 sets optimum bias and reference

conditions on chip. Calibration of the SA4101A should be

done on the voltage input and not on the VREF input.

Current Sense Inputs (IIP and IIN)

Figure 6 shows the typical connections for the current sensor

input when using a shunt or a current transformer as a current

resistor values should be selected for an input current of

current of

headroom until saturation occurs.

The resistor RSH is the shunt resistor. The voltage drop

The resistors RA and RB form the current transformers

termination resistor. The reference level is connected in the

centre of the termination resistor to achieve purely differential

input currents. The voltage drop across the termination

also be significantly smaller than the DC resistance of the

current transformers secondary winding.

The resistors R1 to R4 define the current flowing into the

device. For best performance the SA4101A requires anti-

alias filters on the current sense inputs. These filters are

realized by means of the capacitors C1 and C2. The typical

cut-off frequency of these filters should be between 10kHz

and 20kHz. The optimum input network is achieved by setting

This sets the equivalent resistance associated with each

Figure 6: Current sense input configuration

Voltage Sense Input (IVP)

Figure 7 shows the voltage sense input configuration. The

voltage sense input saturates at an input current of

For best performance the SA4101A also requires an anti-

alias filter on the voltage sense input. Referring to Figure 7,

the capacitor C1 is used to implement the anti-alias filter. If a

current transformer is used as a current sensing element then

C1 is also used to compensate for any phase shift caused by

the current transformer. The resistor R4 defines the input

current into the device. The optimum input network is

achieved by setting R4 smaller than 100k

. If R4 is made too

large the capacitor C1 will be very small and the phase shift

of the input network could be affected by stray capacitances.

The potentiometer P1 is used for calibration purposes.

Figure 7: Voltage sense input configuration

R3

R1

IIN

IIP

GND

Current In

I

MAX

16µA

RMS

R4

R2

Current Out

GND

GND

C1

C2

R3

R1

RA

IIN

IIP

GND

CT1

Current In

I

MAX

16µA

RMS

R4

R2

RB

Current Out

C1

C2

RSH

R4

R3

IVP

GND

C1

R2

R1

GND

V

NOM

14µA

RMS

Voltage In

Neutral

GND

R5

P1

(P1 + R5) << R4 << (R1 + R2 + R3)