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RM4104ASEB датащи(PDF) 3 Page - Sames |
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RM4104ASEB датащи(HTML) 3 Page - Sames |
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3 / 16 page ![]() http://www.sames.co.za 3/16 PRELIMINARY RM4104ASEB frequencies. The lowest -3dB cut-off frequency is achieved when all four input resistors are equal (R18 = R19 = R20 = R21 = RC). The current input networks must be balanced so both capacitors C12 and C13 must also be equal (C12 = C13 = CC). In this case the equivalent resistance associated with each capacitor is ½RC and the -3dB cut-off frequency is C C C,-3dB C R 1 f π = (2) This frequency should be somewhere between 10kHz and 20kHz to ensure both adequate attenuation at integer multiplies of the analog to digital converters sampling frequency, and very low phase shift at mains frequency and its harmonics. The requirement for the very low phase is explained under the “Voltage Sense Network” section. VOLTAGE SENSING NETWORK The voltage sensing network performs similar functions to the current sensing network. It senses the mains voltage and converts it to the input current signal required by the SA4104A. It also filters all unwanted signals and prevents them from distorting the performance of the SA4104A. The voltage sensing network is shown in Figure 3. The voltage sensing network is composed of an adjustable voltage divider (resistors R6 to R16) and the current input resistor that generates the required current input signal for the SA4104A. The first consideration when designing the voltage sensing network is that the -3dB cut-off frequency has to be very closely matched to that of the current sensing network. This is important to ensure that the phase shift experienced by the voltage and current signals is identical. If this is not the case the energy meter will have poor performance under non-unity power factor load conditions. The high cut-off frequency of the input network filters does ensure that this matching does not have to be extremely precise. This allows component tolerances to be accommodated without seriously affecting the performance of the meter. The best matching between the cut-off frequencies is achieved by using identical capacitors on both the current and voltage sensing networks, so C11 should equal C12 and C13. The IVP input is a virtual short circuit to analog ground (AGND) so the equivalent resistance associated with C11 is X 11 C equ R || 17 R || 16 R R = − (3) where RX is the series combination of R6, R7 and Rtrim. Further, Rtrim is the series combination of the resistors R8 to R15 that can be enabled or disabled to calibrate the meter. If both RX and R17 are designed to be significantly larger than R16 then 16 R R 11 C equ ≈ − (4) To match the -3dB cut-off frequency of the Current Sensing Network R16 should therefore equal ½RC which is the value of the current sense network equivalent resistance. This ensures balanced phase shifts on the current and voltage input networks so the performance of the meter at non-unity power factors will not be affected. The voltage input IVP of the SA4104Ahas to be driven with a current of 11 μARMS at the nominal rated mains voltage. This input also saturates at 25 μA peak current, so the11 μARMS input current allows for 50% overdrive capability while maintaining linearity. This ensures that the device will not saturate with a ±20%variation in mains voltage. The simplest method is to set the input resistor R17 at 100 times the value of R16, so it will not significantly affect the -3dB cut-off frequency of the voltage sense network. Setting 50R R16 100 R17 C = × = (5) sets the required output voltage on the voltage divider to R16 100 10 11 V -6 D × × × = (6) because the IVP pin has a virtual short to ground. Given that R17 and RX are large compared to R16 NOM X NOM X D V R R16 V R R16 R16 V × ≈ × + = (7) Combining these equations results in NOM 4 NOM X V 909 10 11 V R ≈ × = − , (8) R10 LIVE IN R11 SA4104A IVP AGND C11 C C 15 16 R12 R13 R14 R15 R6 R7 R8 R9 R17 NEUTRAL R16 ½R C 50R C J1 J2 J3 J4 J5 J6 J7 J8 R trim V D R10 LIVE IN R11 SA4104A IVP AGND C11 C C 15 16 R12 R13 R14 R15 R6 R7 R8 R9 R17 NEUTRAL R16 ½R C 50R C J1 J2 J3 J4 J5 J6 J7 J8 R trim V D Figure 3: Circuit diagram of the voltage sensing network |
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