P87LPC761 datasheet(32/58 Pages) PHILIPS

32 / 58 page

Philips Semiconductors

Preliminary data

P87LPC761

Low power, low price, low pin count (16 pin)

microcontroller with 2 kbyte OTP

2002 Mar 07

Mode 0

Putting either Timer into Mode 0 makes it look like an 8048 Timer,

which is an 8-bit Counter with a divide-by-32 prescaler. Figures 24

and 25 show Mode 0 operation.

In this mode, the Timer register is configured as a 13-bit register. As

the count rolls over from all 1s to all 0s, it sets the Timer interrupt

flag TFn. The count input is enabled to Timer 0 when TR0 = 1 and

either GATE = 0 or INT0 = 1. (Setting GATE = 1 allows the Timer to

be controlled by external input INT0, to facilitate pulse width

measurements). TRn is a control bit in the Special Function Register

TCON (Figure 23). The GATE bit is in the TMOD register (TMOD.3).

The 13-bit register consists of all 8 bits of THn and the lower 5 bits

of TLn. The upper 3 bits of TLn are indeterminate and should be

ignored. Setting the run flag (TRn) does not clear the registers.

Mode 0 operation is slightly different for Timer 0 and Timer 1. See

Figures 24 and 25.

BIT

SYMBOL

FUNCTION

TCON.7

TF1

Timer 1 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when the

interrupt is processed, or by software.

TCON.6

TR1

Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter 1 on/off.

TCON.5

TF0

Timer 0 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when the

processor vectors to the interrupt routine, or by software.

TCON.4

TR0

Timer 0 Run control bit. Set/cleared by software to turn Timer/Counter 0 on/off.

TCON.3, 2

–

Reserved (must be 0).

TCON.1

IE0

Interrupt 0 Edge flag. Set by hardware when external interrupt 0 edge is detected. Cleared by

hardware when the interrupt is processed, or by software.

TCON.0

IT0

Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level triggered

external interrupts.

IT0

SU01543

IE0

–

TR0

TF0

TR1

TF1

TCON

Reset Value: 00h

Bit Addressable

Address: 88h

Figure 23. Timer/Counter Control Register (TCON)

SU01544

TL0

(5 BITS)

TH0

(8 BITS)

OSC/6

OSC/12

OVERFLOW

T0 PIN

T0OE

TOGGLE

CONTROL

C/T = 1

C/T = 0

T0 PIN

TR0

GATE

INT0 PIN

INTERRUPT

TF0

Figure 24. Timer/Counter 0 in Mode 0 (13-Bit Timer/Counter)

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