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AD7654ASTZ датащи(PDF) 25 Page - Analog Devices

номер детали AD7654ASTZ
подробное описание детали  16-Bit, 500 kSPS PulSAR Dual, 2-Channel, Simultaneous Sampling ADC
PDF  28 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD7654ASTZ датащи(HTML) 25 Page - Analog Devices

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AD7654
Data Sheet
Rev. D | Page 24 of 27
MICROPROCESSOR INTERFACING
The AD7654 is ideally suited for traditional dc measurement
applications supporting a microprocessor and for ac signal
processing applications interfacing to a digital signal processor.
The AD7654 is designed to interface with either a parallel 8-bit
wide or 16-bit wide interface, a general-purpose serial port, or
I/O ports on a microcontroller. A variety of external buffers can
be used with the AD7654 to prevent digital noise from coupling
into the ADC. The following section illustrates the use of the
AD7654 with an SPI equipped DSP, the ADSP-2191M.
SPI INTERFACE (ADSP-2191M)
Figure 35 shows an interface diagram between the AD7654 and
the SPI equipped ADSP-2191M. To accommodate the slower speed
of the DSP, the AD7654 acts as a slave device and data must be
read after conversion. This mode also allows the daisy-chain
feature. The convert command can be initiated in response to
an internal timer interrupt. The 32-bit output data is read with
two serial peripheral interface (SPI) 16-bit wide accesses. The
reading process can be initiated in response to the
end-of-conversion signal (BUSY going low) using an
interrupt line of the DSP. By writing to the SPI control register
(SPICLTx), the serial interface (SPI) on the ADSP-2191M is
configured for master mode (MSTR) = 1, clock polarity bit
(CPOL) = 0, clock phase bit (CPHA) = 1, and SPI interrupt
enable (TIMOD) = 00. To meet all timing requirements, limit
the SPI clock to 17 Mbps, allowing it to read an ADC result in
less than 1 μs. When a higher sampling rate is desired, using one
of the parallel interface modes is recommended.
AD7654*
ADSP-2191M*
SER/PAR
PFx
MISOx
SCKx
PFx or TFSx
BUSY
SDOUT
SCLK
CNVST
EXT/INT
CS
RD
INVSCLK
DVDD
*ADDITIONAL PINS OMITTED FOR CLARITY
SPIxSEL (PFx)
Figure 35. Interfacing the AD7654 to an SPI Interface



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