REV. D

AD8021

–17–

Table II. Summary of ADC Driver Performance,

Parameter

Measurement

Unit

Second Harmonic Distortion

–101.3

dB

Third Harmonic Distortion

–109.5

dB

THD

–100.0

dB

SFDR

100.3

dB

50

5V

AD8021

+

–

–12V

+12V

AD7665

570kSPS

50

3

2

750

IN

LO

IN

6

50

HI

ADC

5

82.5

Table III. Summary of ADC Driver Performance,

Parameter

Measurement

Unit

Second Harmonic Distortion

–92.6

dB

Third Harmonic Distortion

–86.4

dB

THD

–84.4

dB

SFDR

5.4

dB

Figure 9 shows another ADC driver connection. The circuit was

tested with a noninverting gain of 10.1 and an output voltage of

approximately 20 V p-p for optimum resolution and noise per-

formance. No filtering was used. An FFT was performed using

Analog Devices’ evaluation software for the AD7665 16-bit

converter. The results are listed in Table III.

DIFFERENTIAL DRIVER

The AD8021 is uniquely suited as a low noise differential driver

for many ADCs, balanced lines, and other applications requiring

differential drive. If pairs of internally compensated op amps are

configured as inverter and follower, the noise gain of the inverter

will be higher than that of the follower section, resulting in an

imbalance in the frequency response (see Figure 11).

A better solution takes advantage of the external compensation

its bandwidth may be increased to match that of the follower,

avoiding compromises in gain bandwidth and phase delay. The

inverting and noninverting bandwidths can be closely matched

using the compensation feature, thus minimizing distortion.

DISABLE

8

7

6

1

2

3

LOGIC REFERENCE

–IN

+IN

4

5

BYPASS

CAPACITOR

GROUND

PLANE

COMPENSATION

CAPACITOR

GROUND

PLANE

(TOP VIEW)

BYPASS

CAPACITOR

METAL

Figure 7. Recommended Location of Critical

Components and Guard Ring

DRIVING 16-BIT ADCS

Low noise and adjustable compensation make the AD8021

especially suitable as a buffer/driver for high resolution analog-

to-digital converters.

As seen in TPC 15, the harmonic distortion is better than 90 dB at

frequencies between 100 kHz and 1 MHz. This is a real advantage

for complex waveforms that contain high frequency information,

as the phase and gain integrity of the sampled waveform can be

preserved throughout the conversion process. The increase in

loop gain results in improved output regulation and lower noise

when the converter input changes state during a sample. This

advantage is particularly apparent when using 16-bit high resolu-

tion ADCs with high sampling rates.

Figure 8 shows a typical ADC driver configuration. The AD8021

is 10 V p-p. The results are listed in Table II.

50

5V

AD8021

+

–

–12V

+12V

AD7665

570kSPS

590

3

2

1.5k

IN

LO

IN

6

HI

5

10pF

56pF

200

65kHz