THS7530

SLOS405A DECEMBER 2002– REVISED APRIL 2003

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13

THEORY OF OPERATION

Figure 26 shows a simplified schematic of the THS7530.

The input architecture is a modified Gilbert Cell. The output from the Gilbert Cell is converted to a voltage and buffered

to the output as a fully-differential signal. A summing node between the outputs is used to compare the output

The gain control input is conditioned to give linear in dB gain control (block H). The gain control input is a differential

signal from 0 V to 0.9 V which varies the gain from 11.6 dB to 46.5 dB.

Output

Buffer

Power

Control

H

VOUT+

VOUT–

VOCM

VCL–

VCL+

VS+

VIN+

VIN–

PD

VS–

VG+

VG–

THS7530

x1

VOCM Error

Amplifier

Figure 26. THS7530 Simplified Schematic