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LMH6723 датащи(PDF) 14 Page - National Semiconductor (TI) |
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LMH6723 датащи(HTML) 14 Page - National Semiconductor (TI) |
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14 / 17 page ![]() Application Section (Continued) LAYOUT CONSIDERATIONS Whenever questions about layout arise, use the evaluation board as a guide. Evaluation boards are shipped with sample requests. To reduce parasitic capacitances ground and power planes should be removed near the input and output pins. Compo- nents in the feedback loop should be placed as close to the device as possible. For long signal paths controlled imped- ance lines should be used, along with impedance matching at both ends. Bypass capacitors should be placed as close to the device as possible. Bypass capacitors from each rail to ground are applied in pairs. The larger electrolytic bypass capacitors can be located anywhere on the board; however, the smaller ceramic capacitors should be placed as close to the device as possible. VIDEO PERFORMANCE The LMH6723/LMH6724/LMH6725 has been designed to provide good performance with both PAL and NTSC com- posite video signals. The LMH6723/LMH6724/LMH6725 is specified for PAL signals. Typically, NTSC performance is marginally better due to the lower frequency content of the signal. Performance degrades as the loading is increased; therefore, best performance will be obtained with back ter- minated loads. The back termination reduces reflections from the transmission line and effectively masks transmis- sion line and other parasitic capacitances from the amplifier output stage. Figure 4 shows a typical configuration for driving a 75 Ω cable. The amplifier is configured for a gain of 2 to make up for the 6dB of loss in R OUT. SINGLE 5V SUPPLY VIDEO With a 5V supply the LMH6723/LMH6724/LMH6725 is able to handle a composite NTSC video signal, provided that the signal is AC coupled and level shifted so that the signal is centered around V CC/2. POWER DISSIPATION Follow these steps to determine the maximum power dissi- pation for the LMH6723/LMH6724/LMH6725: 1. Calculate the quiescent (no-load) power: P AMP =ICC * (V S)VS =V + -V- 2. Calculate the RMS power dissipated in the output stage: P D (rms) = rms ((VS-VOUT)*IOUT) where VOUT and IOUT are the voltage and current across the external load and V S is the total supply current. 3. Calculate the total RMS power: P T =PAMP +PD The maximum power that the LMH6723/LMH6724/LMH6725 package can dissipate at a given temperature can be de- rived with the following equation: P MAX = (150 o -T AMB)/ θ JA, where TAMB = Ambient tempera- ture (˚C) and θ JA = Thermal resistance, from junction to ambient, for a given package (˚C/W). For the SOIC-8 pack- age θ JA is 166˚C/W and for the SOT it is 230˚C/W. The SOIC-14 has a θ JA of 130˚C/W. The TSSOP-14 has a θ JA of 160˚C/W. ESD PROTECTION The LMH6723/LMH6724/LMH6725 is protected against electrostatic discharge (ESD) on all pins. The LMH6723/ LMH6725 will survive 2000V Human Body Model or 200V Machine Model events. Under closed loop operation the ESD diodes have no effect on circuit performance. There are occasions, however, when the ESD diodes will be evident. If the LMH6723/LMH6724/ LMH6725 is driven into a slewing condition the ESD diodes will clamp large differential voltages until the feedback loop restores closed loop operation. Also, if the device is powered down and a large input signal is applied, the ESD diodes will conduct. 20078943 FIGURE 8. Composite Amplifier Frequency Response www.national.com 14 |
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