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AD7923 датащи(PDF) 2 Page - Analog Devices |
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AD7923 датащи(HTML) 2 Page - Analog Devices |
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2 / 20 page ![]() –2– REV. 0 (AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX, unless otherwise noted.) Parameter B Version 1 Unit Test Conditions/Comments DYNAMIC PERFORMANCE fIN = 50 kHz Sine Wave, fSCLK = 20 MHz Signal-to-(Noise + Distortion) (SINAD) 2 70 dB min @ 5 V 69 dB min @ 3 V Typically 70 dB Signal-to-Noise Ratio (SNR) 2 70 dB min Total Harmonic Distortion (THD) 2 –77 dB max @ 5 V Typically –84 dB –73 dB max @ 3 V Typically –77 dB Peak Harmonic or Spurious Noise –78 dB max @ 5 V Typically –86 dB (SFDR) 2 –76 dB max @ 3 V Typically –80 dB Intermodulation Distortion (IMD) 2 fa = 40.1 kHz, fb = 41.5 kHz Second Order Terms –90 dB typ Third Order Terms –90 dB typ Aperture Delay 10 ns typ Aperture Jitter 50 ps typ Channel-to-Channel Isolation 2 –85 dB typ fIN = 400 kHz Full Power Bandwidth 8.2 MHz typ @ 3 dB 1.6 MHz typ @ 0.1 dB DC ACCURACY 2 Resolution 12 Bits Integral Nonlinearity ±1 LSB max Differential Nonlinearity –0.9/+1.5 LSB max Guaranteed No Missed Codes to 12 Bits. 0 V to REFIN Input Range Straight Binary Output Coding Offset Error ±8 LSB max Typically ±0.5 LSB Offset Error Match ±0.5 LSB max Gain Error ±1.5 LSB max Gain Error Match ±0.5 LSB max 0 V to 2 ¥ REFIN Input Range –REFIN to +REFIN Biased about REFIN with Positive Gain Error ±1.5 LSB max Twos Complement Output Coding Positive Gain Error Match ±0.5 LSB max Zero Code Error ±8 LSB max Typically ±0.8 LSB Zero Code Error Match ±0.5 LSB max Negative Gain Error ±1 LSB max Negative Gain Error Match ±0.5 LSB max ANALOG INPUT Input Voltage Range 0 to REFIN V RANGE Bit Set to 1 0 to 2 ¥ REFIN V RANGE Bit Set to 0, AVDD/VDRIVE = 4.75 V to 5.25 V DC Leakage Current ±1 mA max Input Capacitance 20 pF typ REFERENCE INPUT REFIN Input Voltage 2.5 V ±1% Specified Performance DC Leakage Current ±1 mA max REFIN Input Impedance 36 k W typ fSAMPLE = 200 kSPS LOGIC INPUTS Input High Voltage, VINH 0.7 ¥ VDRIVE V min Input Low Voltage, VINL 0.3 ¥ VDRIVE V max Input Current, IIN ±1 mA max Typically 10 nA, VIN = 0 V or VDRIVE Input Capacitance, CIN 3 10 pF max LOGIC OUTPUTS Output High Voltage, VOH VDRIVE – 0.2 V min ISOURCE = 200 mA, AVDD = 2.7 V to 5.25 V Output Low Voltage, VOL 0.4 V max ISINK = 200 mA Floating-State Leakage Current ±1 mA max Floating-State Output Capacitance 3 10 pF max Output Coding Straight (Natural) Binary Coding Bit Set to 1 Twos Complement Coding Bit Set to 0 AD7923–SPECIFICATIONS |
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