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PI6C180B датащи(PDF) 3 Page - Pericom Semiconductor Corporation |
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PI6C180B датащи(HTML) 3 Page - Pericom Semiconductor Corporation |
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3 / 7 page ![]() PI6C180B Precision 1-18 Clock Buffer 3 PS8468 05/03/00 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 2-Wire I2C Control The I2C interface permits individual enable/disable of each clock output and test mode enable. ThePI6C180Bisaslavereceiverdevice. Itcannotbereadback. Sub addressing is not supported. All preceding bytes must be sent in order to change one of the control bytes. Every bite put on the SDATA line must be 8-bits long (MSB first), followed by an acknowledge bit generated by the receiving device. During normal datatransfersSDATAchangesonlywhenSCLOCK is LOW. Exceptions: A HIGH to LOW transition on SDATA while SCLOCK is HIGH indicates a start condition. A LOW to HIGH transition on SDATAwhile SCLOCK is HIGH is a stop condition and indicates the end of a data transfer cycle. Each data transfer is initiated with a start condition and ended with a stop condition. The first byte after a start condition is always a 7-bit address byte followed by a read/write bit. (HIGH = read from addressed device, LOW= write to addressed device). If the devices own address is detected, PI6C180B generates an acknowledge by pulling SDATA line LOW during ninth clock pulse, then accepts the following data bytes until another start or stop condition is detected. Following acknowledgement of the address byte (D2), two more bytes must be sent: 1. Command Code byte, and 2. Byte Count byte. Although the data bits on these two bytes are dont care, they must be sent and acknowledged. Byte1: SDRAM Active/Inactive Register (1 = enable, 0 = disable) Byte2: Optional Register for Possible Future Requirements (1 = enable, 0 = disable) ti B# n i Pn o it p i r c s e D 7 ti B5 4) e v it c a n I/ e v it c A ( 5 1 M A R D S 6 ti B4 4) e v it c a n I/ e v it c A ( 4 1 M A R D S 5 ti B1 4) e v it c a n I/ e v it c A ( 3 1 M A R D S 4 ti B0 4) e v it c a n I/ e v it c A ( 2 1 M A R D S 3 ti B6 3) e v it c a n I/ e v it c A ( 1 1 M A R D S 2 ti B5 3) e v it c a n I/ e v it c A ( 0 1 M A R D S 1 ti B2 3) e v it c a n I/ e v it c A ( 9 M A R D S 0 ti B1 3) e v it c a n I/ e v it c A ( 8 M A R D S ti B# n i Pn o it p i r c s e D 7 ti B8 2) e v it c a n I/ e v it c A ( 7 1 M A R D S 6 ti B1 2) e v it c a n I/ e v it c A ( 6 1 M A R D S 5 ti B) d e v r e s e R ( 4 ti B) d e v r e s e R ( 3 ti B) d e v r e s e R ( 2 ti B) d e v r e s e R ( 1 ti B) d e v r e s e R ( 0 ti B) d e v r e s e R ( Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................. –65°C to +150°C Ambient Temperature with Power Applied .............................. –0°C to +70°C 3.3V Supply Voltage to Ground Potential .............................. –0.5V to +4.6V DC Input Voltage .................................................................... –0.5V to +4.6V Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Supply Current (VDD = +3.465V, CLOAD = Max.) l o b m y Sr e t e m a r a Pn o it i d n o C t s e T. n i M. p y T. x a Ms ti n U I D D t n e rr u C y l p p u Sz H M 0 = N I _ F U B3 A m I D D t n e rr u C y l p p u Sz H M 6 6 . 6 6 = N I _ F U B0 3 2 I D D t n e rr u C y l p p u Sz H M 0 . 0 0 1 = N I _ F U B0 6 3 |
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