AD9865 datasheet(21/49 Pages) AD

21 / 49 page

AD9865

Data Sheet

Rev. B | Page 20 of 48

Address

(Hex)1

Bit

Break-

down

Description

Width

Power-Up Default Value

Comments

MODE = 0 (Half-Duplex)

MODE = 1 (Full-Duplex)

CONFIG = 0

CONFIG = 1

CONFIG = 0

CONFIG = 1

Rx PATH CONTROL

0x07

(5)

Initiate Offset Cal.

Default setting has LPF ON

and Rx path at nominal

power bias setting.

*Rx path to low power.

(4)

Rx Low Power

(0)

Rx Filter ON

0x08

(7:0)

Rx Filter Tuning

Cut-off Frequency

0x80

0x61

0x80

Refer to Low-Pass Filter

section.

Tx/Rx PATH GAIN CONTROL

0x09

(6)

Use SPI Rx Gain

0x00

Default setting is for

hardware Rx gain code via

PGA or Tx data port.

(5:0)

Rx Gain Code

0x0A

(6)

Use SPI Tx Gain

0x7F

Default setting is for Tx gain

code via SPI control.

(5:0)

Tx Gain Code

Tx AND Rx PGA CONTROL

0x0B

(6)

PGA Code for Tx

Default setting is RxPGA

control active.

*Tx port with GAIN strobe

(AD9875/AD9876-compatible).

** 3-bit RxPGA gain map

(AD9975-compatible).

(5)

PGA Code for Rx

(3)

Force GAIN strobe

(2)

Rx Gain on Tx Port

(1)

3-Bit RxPGA Port

1**

Tx DIGITAL FILTER AND INTERFACE

0x0C

(7:6)

Interpolation

Factor

Default setting is 2×

interpolation with LPF

response. Data format is

straight binary for half-

duplex and twos

complement for full-duplex

interface.

*Full-duplex only.

(4)

Invert

TXEN/TXSYNC

(3)

Tx 5/5 Nibble*

N/A

(2)

LS Nibble First*

N/A

(1)

TXCLK neg. edge

(0)

Twos complement

Rx INTERFACE AND ANALOG/DIGITAL LOOPBACK

0x0D

(7)

Analog Loopback

Data format is straight

binary for half-duplex and

twos complement for full-

duplex interface.

Analog loopback: ADC Rx

data fed back to TxDAC.

Digital loopback: Tx input

data to Rx output port.

*Full-duplex only.

(6)

Digital Loopback*

(5)

Rx Port 3-State

N/A

(4)

Invert

RXEN/RXSYNC

(3)

RX 5/5 Nibble

N/A

(2)

LS Nibble First*

N/A

(1)

RXCLK neg. edge

(0)

Twos complement

DIGITAL OUTPUT DRIVE STRENGTH, TxDAC OUTPUT, AND REV ID

0x0E

(7)

Low Drive

Strength

Default setting is for high

drive strength and IAMP

enabled.

(0)

TxDAC Output

0x0F

(3:0)

REV ID Number

0x00

Tx IAMP GAIN AND BIAS CONTROL

0x10

(7)

Select Tx Gain

0x44

Secondary path G1 = 0, 1, 2,

3, 4.

Primary path N = 0, 1, 2, 3, 4.

(6:4)

(2:0)

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