TLD10750

August 1994

NM93CS06CS46CS56CS66

(MICROWIRE

Serial EEPROM with Data Protect and Sequential Read

General Description

The

NM93CS06CS46CS56CS66

devices

are

256

102420484096 bits respectively of CMOS non-volatile

electrically erasable memory divided into 1664128

256 16-bit registers Selected registers can be protected

against data modification by programming the Protect Reg-

ister with the address of the first register to be protected

against data modification (all registers greater than or equal

to the selected address are then protected from further

change) Additionally this address can be ‘‘locked’’ into the

device making all future attempts to change data impossi-

ble These devices are fabricated using National Semicon-

ductor floating-gate CMOS process for high reliability high

endurance and low power consumption The NM93CSXX

Family is offered in an SO package for small space consid-

erations

The EEPROM interfacing is MICROWIRE compatible pro-

viding simple interfacing to standard microcontrollers and

microprocessors There are a total of 10 instructions 5

which operate on the EEPROM memory and 5 which oper-

ate on the Protect Register The memory instructions are

READ WRITE WRITE ALL WRITE ENABLE and WRITE

DISABLE The Protect register instructions are PRREAD

PRWRITE PRENABLE PRCLEAR and PRDISABLE

Features

Y

Write protection in a user defined section of memory

Y

Sequential register read

Y

Typical active current of 400 mA and standby current of

25 mA

Y

No erase required before write

Y

Reliable CMOS floating gate technology

Y

MICROWIRE compatible serial IO

Y

Self timed write cycle

Y

Device status during programming mode

Y

40 year data retention

Y

Y

45V to 55V operation in all modes of operation

Y

Packages available 8-pin SO 8-pin DIP

Block Diagram

TLD10750 – 1

TRI-STATE

is a registered trademark of National Semiconductor Corporation

C1995 National Semiconductor Corporation

RRD-B30M75Printed in U S A