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LTC3413 датащи(PDF) 9 Page - Linear Technology |
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LTC3413 датащи(HTML) 9 Page - Linear Technology |
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9 / 16 page ![]() 9 LTC3413 sn3413 3413fs dielectrics have the best temperature and voltage charac- teristics of all the ceramics for a given value and size. Output Voltage Programming In most applications, VOUT is connected directly to VFB. The output voltage will be equal to one-half of the voltage on the VREF pin for this case. V V OUT REF = 2 If a different output voltage relationship is desired, an external resistor divider from VOUT to VFB can be used. The output voltage will then be set according to the following equation: pulled above 2V. The full current range becomes available on ITH after 1024 switching cycles. If a longer soft-start period is desired, the clamp on ITH can be set externally with a resistor and capacitor on the RUN/SS pin as shown in Figure 1a. The soft-start duration can be calculated by using the following formula: tR VV SS SS IN = • C ln V (Seconds) SS IN –. 18 Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% - (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses: VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence. 1. The VIN quiescent current is due to two components: the DC bias current as given in the Electrical Characteris- tics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from APPLICATIO S I FOR ATIO R2 VOUT R1 3413 F02 VFB SGND LTC3413 Figure 2. Setting the Output Voltage V VR R OUT REF =+ 2 1 2 1 Soft-Start The RUN/SS pin provides a means to shut down the LTC3413 as well as a timer for soft-start. Pulling the RUN/SS pin below 0.5V places the LTC3413 in a low quiescent current shutdown state (IQ < 1µA). The LTC3413 contains an internal soft-start clamp that gradually raises the clamp on ITH after the RUN/SS pin is |
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