AD6644STSLASHPCBZ datasheet(18/25 Pages) AD

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AD6644

Rev. D | Page 17 of 24

Jitter Considerations

The signal-to-noise ratio (SNR) for an ADC can be predicted.

When normalized to ADC codes, Equation 1 accurately

predicts the SNR based on three terms. These are jitter, average

DNL error, and thermal noise. Each of these terms contributes

to the noise within the converter (see Equation 1).

() +

⎢

⎣

⎡

⎟

⎠

⎞

⎜

⎝

⎛ +

−

log

rms

ANALOG

SNR

⎥

⎦

⎤

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

rms

NOISE

(1)

where:

fANALOG is the analog input frequency.

tj rms is the rms jitter of the encode (rms sum of encode source

and internal encode circuitry).

ε is the average DNL of the ADC (typically 0.41 LSB).

n is the number of bits in the ADC.

VNOISE rms is the V rms thermal noise referred to the analog input

of the ADC (typically 2.5 LSB).

For a 14-bit ADC like the AD6644, aperture jitter can greatly

affect the SNR performance as the analog frequency is

increased. Figure 31 shows a family of curves that demonstrates

the expected SNR performance of the AD6644 as jitter increases

and is derived from Equation 1.

For a complete review of aperture jitter, see Application Note

AN-756, Sampled Systems and the Effects of Clock Phase Noise

and Jitter, at www.analog.com.

JITTER (ps)

AIN = 190MHz

AIN = 150MHz

AIN = 110MHz

AIN = 30MHz

AIN = 70MHz

0.1

0.2

0.3

0.4

0.5

0.6

Figure 31. SNR vs. Jitter

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