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ECF800 датащи(PDF) 4 Page - E-CMOS Corporation |
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ECF800 датащи(HTML) 4 Page - E-CMOS Corporation |
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4 / 8 page ![]() E-CMOS Corp. (www.ecmos.com.tw) Page 4 of 8 4K10N Rev. F001 315/433MHz OOK/ASK Receiver SOC for Home Automation ECF800 Function description The ECF800 CMOS RF SOIC receiver, and a few external components, provides the complete receiver chain from the antenna to the interface data, which are IR, PWM, UART and ON/OFF.It can work FAVEPC’s RFID RC air interface protocol.The ECF800 is designed to receive binary ASK/OOK data modulated in the 315/433.92MHz.ASK modulation uses a difference in amplitude of the carrier to represent digital data ->Voltage Regulator ECF800 provides two internal voltage regulators to the whole receiver SOIC blocks. The regulator input pin is VCC5. ->RF Front-end (LNA & Mixer) The signal is received and amplified by RFfront-end.The LNA and mixer have achieved voltage gain and excellent reversed isolation at LNA input port. The gain and noise figure are dependent on both the antenna matching network at the LNA input and LC tank network between the LNA output and the mixer inputs. The ANT pin can be matched to 50 Ohms with L-type circuit as shown on application circuit. Inductor and capacitor values may be different from table depend on PCB material, PCB thickness, ground configuration, how long the trace are in the layout and also different application frequency. ->Phase-locked Loop (PLL) The PLL block contains a phase detector, charge pump, integrated loop filter, VCO, asynchronous clock dividers, and crystal-oscillator driver. Beside the crystal and its loaded capacitors, this PLL does not require any external components. ->Image-rejection Filter and Band-Pass Filter The IF ports of the mixer produce quadrature-down converted IF signals. These IF signals are low-pass filtered to remove higher frequency products prior to the image rejection filter where they are combined to reject the image frequency. The filter is fully integrated inside the ECF800 and IF bandwidth is 300 KHz. ->Received-signal Strength Indictor (RSSI) The RSSI circuit provides a DC output proportional to the logarithm of the input power level. RSSI output voltage has a slope of about 18mV/dB (of input power). The RSSI monotonic dynamic range exceeds 75dB. The OOK/ASK demodulation is done by comparing the RSSI signal level. ->Automatic Gain Control (AGC) The AGC circuit monitors the RSSI output. Receiver Font End (FE) would switch to low gain mode when RSSI indicate the receipted power higher than a power threshold. Low receiver FE gain can improve circuit’s linearity for RF high power input. ->Data Filter The data filter is implemented by 2nd order Sallen-key low-pass filter. This filter is fully integrated in ECF800 and no external components needed. |
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