AD9255 datasheet(4/45 Pages) AD

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Data Sheet

AD9255

Rev. C | Page 3 of 44

GENERAL DESCRIPTION

The AD9255 is a 14-bit, 125 MSPS analog-to-digital converter

(ADC). The AD9255 is designed to support communications

applications where high performance combined with low cost,

small size, and versatility is desired.

The ADC core features a multistage, differential pipelined

architecture with integrated output error correction logic to

provide 14-bit accuracy at 125 MSPS data rates and guarantees

no missing codes over the full operating temperature range.

The ADC features a wide bandwidth differential sample-and-

hold analog input amplifier supporting a variety of user-selectable

input ranges. It is suitable for multiplexed systems that switch

full-scale voltage levels in successive channels and for sampling

single-channel inputs at frequencies well beyond the Nyquist rate.

Combined with power and cost savings over previously available

ADCs, the AD9255 is suitable for applications in communications,

instrumentation, and medical imaging.

A differential clock input controls all internal conversion cycles. A

duty cycle stabilizer provides the means to compensate for vari-

ations in the ADC clock duty cycle, allowing the converters to

maintain excellent performance over a wide range of input

clock duty cycles. An integrated voltage reference eases design

considerations.

The ADC output data format is either parallel 1.8 V CMOS or

LVDS (DDR). A data output clock is provided to ensure proper

latch timing with receiving logic.

Programming for setup and control is accomplished using a 3-wire

SPI-compatible serial interface. Flexible power-down options

allow significant power savings, when desired. An optional on-

chip dither function is available to improve SFDR performance

with low power analog input signals.

The AD9255 is available in a Pb-free, 48-lead LFCSP and is

specified over the industrial temperature range of −40°C to +85°C.

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