REV. 0

–12–

ADM1070

FUNCTIONALITY AND TIMING

Live Insertion

The timing waveforms associated with the live insertion of a

plug-in board using the ADM1070 are shown in the following

constant 12.3 V and is held at this level with the shunt resistor

When UV/OV crosses the undervoltage rising threshold of

0.91 V, it is now inside the operating voltage window and the

–48 V supply must be applied to the load. After a time delay,

voltage on the SENSE Pin reaches 100 mV (the analog current

limit) the gate drive is held constant. When the board capaci-

tance is fully charged, the sense voltage begins to drop below

the analog current limit voltage and the gate voltage is free to

ramp up further. The gate voltage eventually reaches its maxi-

UV/OV

GATE

SENSE

Figure 5. Timing Waveforms Associated with a

Live Insertion Event

GATE

SENSE

CH2

5.00V

CH1

10.00V

CH3

100mV

M 500 s

CH1

2.8V

T

T

Figure 6. Start-Up Sequence

OVERVOLTAGE AND UNDERVOLTAGE

The waveforms for an overvoltage glitch are shown below.

When UV/OV glitches above the overvoltage rising threshold of

1.97 V, an overvoltage condition is detected and the gate volt-

age is pulled low. UV/OV begins to drop a back toward the

operating voltage window and the gate drive is restored when

the overvoltage falling threshold of 1.93 V is reached. Figure 7

illustrates the ADM1070’s operation in an overvoltage situation.

GATE

SENSE

CH2

10.00V

CH1

1.00V

CH3

100mV

M 200 s

CH3

1.96V

T

T

Figure 7. Timing Waveforms Associated with an

Overvoltage Glitch

An undervoltage glitch is dealt with in a similar way. When

the gate voltage is pulled low. If UO/UV subsequently rises

back above the undervoltage rising threshold of 0.91 V, then the

gate voltage is restored. Figure 8 illustrates the ADM1070’s

operation in an undervoltage situation.

GATE

SENSE

CH2

10.0V

CH1

1.00V

CH3

100mV

M 200ms

Figure 8. Timing Waveforms Associated with an

Undervoltage Glitch