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PIC12CE67X датащи(PDF) 86 Page - Microchip Technology

номер детали PIC12CE67X
подробное описание детали  8-Pin, 8-Bit CMOS Microcontroller with A/D Converter and EEPROM Data Memory
PDF  116 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC12CE67X датащи(HTML) 86 Page - Microchip Technology

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PIC12CE67X
DS40181B-page 86
Preliminary
© 1998 Microchip Technology Inc.
Output High Voltage
D090
I/O ports/CLKOUT (Note 3)
VOH
VDD - 0.7
-
-
V
IOH = -3.0 mA, VDD = 4.5V,
–40
°C to +85°C
D090A
VDD - 0.7
-
-
V
IOH = -2.5 mA, VDD = 4.5V,
–40
°C to +125°C
D092
OSC2
VDD - 0.7
-
-
V
IOH = -1.3 mA, VDD = 4.5V,
–40
°C to +85°C
D092A
VDD - 0.7
-
-
V
IOH = -1.0 mA, VDD = 4.5V,
–40
°C to +125°C
Capacitive Loading Specs on
Output Pins
D100
OSC2 pin
COSC2
-
-
15
pF
In XT, HS and LP modes when
external clock is used to drive
OSC1.
D101
All I/O pins and OSC2
CIO
-
-
50
pF
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise specified)
Operating temperature
0˚C
≤ TA ≤ +70˚C (commercial)
–40˚C
≤ TA ≤ +85˚C (industrial)
–40
°C ≤ TA ≤ +125˚C (extended)
Operating voltage VDD range as described in DC spec Section 12.1 and
Section 12.2.
Param
No.
Characteristic
Sym
Min
Typ
Max
Units
Conditions
Data in “Typ” column is at 5V, 25
°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that
the PIC12C67X be driven with external clock in RC mode.
2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels
represent normal operating conditions. Higher leakage current may be measured at different input voltages.
3: Negative current is defined as coming out of the pin.
4: Extended operating range is Advance Information for this device.
5: When configured as external reset, the input leakage current is the weak pulll-up current of -10mA minimum.
This pull-up is weaker than the standard I/O pull-up.



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