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LT1738 датащи(PDF) 13 Page - Linear Technology |
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LT1738 датащи(HTML) 13 Page - Linear Technology |
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13 / 20 page ![]() 13 LT1738 1738fa Positive Output Voltage Setting Sensing of a positive output voltage is usually done using a resistor divider from the output to the FB pin. The positive input to the error amp is connected internally to a 1.25V bandgap reference. The FB pin will regulate to this voltage. Referring to Figure 3, R1 is determined by: RR VOUT 12 125 1 =− . The FB bias current represents a small error and can usually be ignored for values of R1||R2 up to 10k. One word of caution, sometimes a feedback zero is added to the control loop by placing a capacitor across R1. If the feedback capacitively pulls the FB pin above the internal regulator voltage (2.4V), output regulation may be dis- rupted. A series resistance with the feedback pin can eliminate this potential problem. There is an internal clamp on FB that clamps at 0.7V above the regulation voltage that should also help prevent this problem. APPLICATIO S I FOR ATIO Smaller value capacitors can be made in two ways. The first is simply combining two capacitors in series. The equivalent capacitance is then (C1 • C2)/(C1 + C2). The second method makes use of a capacitor divider. Care should be taken that the voltage rating of the capacitor satisfies the full voltage swing thus essentially the same rating as the MOSFET. The equivalent slew capacitance for Figure 2 is (C1 • C2)/(C1 + C2 + C3). Negative Output Voltage Setting Negative output voltage can be sensed using the NFB pin. In this case regulation will occur when the NFB pin is at –2.5V. The nominal input bias current for the NFB is –25 µA (INFB), which needs to be accounted for in setting up the divider. Referring to Figure 4, R1 is chosen such that: RR V RA OUT 12 25 25 2 25 = − +µ . .• A suggested value for R2 is 2.5k. The NFB pin is normally left open if the FB pin is being used. C1 MOSFET DRAIN C2 CAP C3 1738 F02 Table 2 INPUT VOLTAGE CAPACITOR VALUE < 25V 5pF 50V 2.5pF 100V 1pF Figure 2 Figure 3 Figure 4 FB PIN 1738 F03 VOUT R2 R1 NFB PIN INFB 1738 F04 –VOUT R2 R1 Dual Polarity Output Voltage Sensing Certain applications may benefit from sensing both posi- tive and negative output voltages. When doing this each output voltage resistor divider is individually set as previ- ously described. When both FB and NFB pins are used, the LT1738 will act to prevent either output from going beyond its set output voltage. The highest output (lightest load) will dominate control of the regulator. This technique would prevent either output from going unregulated high at no load. However, this technique will also compromise output load regulation. Shutdown If SHDN is pulled low, the regulator will turn off. As the SHDN pin voltage is increased from ground the internal bandgap regulator will be powered on. This will set a 1.39V threshold for turn on of the internal regulator that runs |
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