Texas Instruments Incorporated

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GC1012B 3.3V DIGITAL TUNER CHIP

SLWS138B

This document contains information which may be changed at any time without notice

REVISION HISTORY

This datasheet is revised from the GC1012A datasheet to reflect the changes in the GC1012B replacement.

0.1

GC1012B TO GC1012A COMPARISON

The GC1012B is designed to be a functional and footprint compatible replacement for the GC1012A chip. The

timing specifications for the GC1012B meet and exceed the timing specifications for the GC1012A. Electrically the

GC1012B is a 3.3 volt only part, making it incompatible with the GC1012A’s 5 volt mode. The GC1012B is fully

compatible with the GC1012A’s 3.3 volt mode, but at a lower power consumption. See Section 4 for timing and electrical

specifications. NOTE: The GC1012B inputs are NOT 5 volt tolerant; chip damage may occur if the input voltages exceed

Vcc + 0.5V (3.8 volts). Designs using the GC1012A at 5 volts will need to add a 3.3 volt supply and voltage level

translators to use the GC1012B.

The function of the GC1012B has been slightly enhanced, but any enhancements are “backward” compatible

with the GC1012A so that a GC1012A user will not need to change any software or processing algorithms to use the

GC1012B chip. The checksums for the diagnostics have changed and are shown on page 7. Highlights of the

enhancements follow.

0.1.1

Clock Loss Detect and Power Down Modes

The GC1012A chip used a slow internal clock to power down the chip or to put it into a low power mode if the

clock is stopped. The slow clock has been removed in the GC1012B and replaced with a mode that will put the chip in

a fully static mode if the clock has stopped. The fully static mode powers down the chip and reduces the power

consumption down to a few microwatts until the clock resumes. The user can also force the power down state if desired.

Two control bits (address 7 bit 5 and address 9 bit 7) are used to control the clock loss detect and power down modes.

One control bit turns off the clock loss detect circuit, the other forces the power down mode. Both bits are cleared at

power up to keep GC1012A compatibility.

See Section 1.9 for details.

0.1.2

Control Interface

The control interface has been enhanced to use either the R/W and CS strobes of the original GC1012A, or to

use the RE, WE and CE strobes used by most memory interfaces. If the RE pin is grounded, then the interface behaves

in the R/W and CS mode, where the WE pin becomes the R/W pin and the CE pin becomes the CS pin. The RE pin on

the GC1012B chip is a ground pin (pin 103) on the GC1012A chip, so that a GC1012B chip soldered into a GC1012A

socket will automatically operate in the GC1012A R/W and CS mode.

See Section 1.3 for details.

Revision

Date

Description

1.0

3 May 2002

First GC1012A datasheet. Major changes in specifications to reflect 3.3volt opera-

tion.

1.1

9 October

2002

Corrected checksum table, page 7