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RT9971 датащи(PDF) 20 Page - Richtek Technology Corporation |
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RT9971 датащи(HTML) 20 Page - Richtek Technology Corporation |
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20 / 22 page ![]() 20 DS9971-01 April 2011 www.richtek.com RT9971 Figure 2. PCB Layout Guide Figure 1. Derating Curves for RT9971 Packages 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 0 25 50 75 100 125 Ambient Temperature ( °C) WQFN-40L 5x5 Four Layers PCB Layout Considerations For the best performance of the RT9971, the following PCB layout guidelines must be strictly followed. } Place the input and output capacitors as close as possible to the input and output pins respectively for good filtering. } Keep the main power traces as wide and short as possible. } The switching node area connected to LX and inductor should be minimized for lower EMI. } Place the feedback components as close as possible to the FB pin and keep these components away from the noisy devices. } Place the compensative components as close as possible to the COMP pin and keep these components away from the noisy devices. } Connect the GND and Exposed Pad to a strong ground plane for maximum thermal dissipation and noise protection. The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA. For RT9971 packages, the Figure 1 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. LX should be connected to inductor by wide and short trace, keep sensitive components away from this trace. 30 29 28 27 26 25 24 23 22 21 31 32 33 34 35 36 37 38 39 40 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 PVDD2 VDDM CFB7 GND LX7 LX5 VOUT7 FB3 EN7 LX3 PVDD1 PVDD6 CP CN PNEG FB6 FB4 EN6 LX4 GND LX6 41 C 23 VBAT C4 VBAT C 26 C24 VBAT D5 L7 L5 D3 C 14 C20 D1 D2 R15 GND WLED+ WLED- C10 R7 R8 L3 GND VOUT_CH3 C9 GND R12 C15 R11 C8 C16 C11 GND L4 C 12 GND R10 R9 C13 C19 R14 R13 VOUT_CH4 D4 L6 C18 R2 R1 C2 C3 R3 C21 R6 C7 R5 R4 C6 L2 C5 GND VOUT_CH2 C22 L1 C1 VBAT VOUT_CH1 GND GND Place the feedback and compensation components as close as possible to the FB and COMP pin and keep away from noisy devices. Input/Output capacitors must be placed as close as possible to the Input/Output pins. Connect the Exposed Pad to a ground plane. C25 VBAT R16 C17 |
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