DS1855

2 of 20

PIN DESCRIPTIONS

Name TSSOP BGA

Description

14

A3

Power Supply Terminal. The DS1855 will support supply

voltages ranging from +2.7V to +5.5V.

GND

7

D1

Ground Terminal.

SDA

1

B2

2-Wire serial data interface. The serial data pin is for serial data

transfer to and from the DS1855. The pin is open drain and may

be wire-ORed with other open drain or open collector interfaces.

SCL

2

A2

2-Wire Serial Clock Input. The serial clock input is used to

clock data into the DS1855 on rising edges and clock data out on

falling edges.

WP

6

C1

Write Protect Input. If set to logic 0, the data in memory and the

potentiometer wiper setting may be changed. If set to logic 1, both

the memory and the potentiometer wiper settings will be write

protected. The WP pin is pulled high internally.

A0

3

A1

Address Input. Pins A0, A1, and A2 are used to specify the

address of each DS1855 when used in a multi-dropped

configuration. Up to eight DS1855s may be addressed on a single

2-wire bus.

A1

4

B1

Address Input.

A2

5

C2

Address Input.

H0

13

A4

High terminal of Potentiometer 0. For both potentiometers, it is

not required that the high terminal be connected to a potential

greater than the low terminal. Voltage applied to the high terminal

H1

11

B3

High terminal of Potentiometer 1.

L0

8

D3

Low terminal of Potentiometer 0. For both potentiometers, it is

not required that the low terminal be connected to a potential less

than the high terminal. Voltage applied to the low terminal of each

L1

10

C4

Low terminal of Potentiometer 1.

W0

9

D4

Wiper terminal of Pot 0. The wiper position of Potentiometer 0

is determined by the byte at EEPROM memory location F9h.

Voltage applied to the wiper terminal of each potentiometer cannot

W1

12

B4

Wiper terminal of Pot 1. The wiper position of Potentiometer 1

is determined by the byte at EEPROM memory location F8h.

NC

C3

No Connect.

NC

D2

No Connect.