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WM8310 датащи(PDF) 91 Page - Cirrus Logic |
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WM8310 датащи(HTML) 91 Page - Cirrus Logic |
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91 / 291 page ![]() Pre-Production WM8310 w PP, May 2012, Rev 3.1 91 ADDRESS BIT LABEL DESCRIPTION Default value is 1 (masked) R16412 (401Ch) Interrupt Status 4 Mask 9 IM_HC_DC2_EINT Interrupt mask. 0 = Do not mask interrupt. 1 = Mask interrupt. Default value is 1 (masked) 8 IM_HC_DC1_EINT Interrupt mask. 0 = Do not mask interrupt. 1 = Mask interrupt. Default value is 1 (masked) 3:0 IM_UV_DCm_EINT Interrupt mask. 0 = Do not mask interrupt. 1 = Mask interrupt. Default value is 1 (masked) Notes: 1. n is a number between 1 and 10 that identifies the individual LDO Regulator (LDO1 - 10). 2. m is a number between 1 and 4 that identifies the individual DC-DC Converter (DC-DC1 - 4). Table 43 Power Management Interrupts 15.14 POWER GOOD INDICATION The WM8310 can indicate the status of the DC-DC Converters and LDO Regulators via a GPIO pin configured as a “PWR_GOOD” output (see Section 21). Each DC-DC Converter and LDO Regulator to be monitored in this way must be individually enabled as an input to the PWR_GOOD function using the register bits defined in Table 44. When a GPIO pin is configured as a “PWR_GOOD” output, this signal is asserted when all selected DC-DC Converters and LDO Regulators are operating correctly. If any of the enabled DC-DC Converters or LDO Regulators is undervoltage, then the PWR_GOOD will be de-asserted. In this event, the host processor should read the Undervoltage Interrupt fields to determine which DC-DC Converter or LDO Regulator is affected. Note that an Undervoltage condition may lead to a Converter being switched off automatically. In this case, the disabled Converter will not indicate the fault condition via PWR_GOOD. Accordingly, the PWR_GOOD signal may not be a reliable output in cases where the WM8310 is configured to shut down any Converters automatically under Undervoltage conditions. It is recommended that the host processor should read the Undervoltage Interrupts in response to PWR_GOOD being de-asserted. The host processor can then initiate the most appropriate response. ADDRESS BIT LABEL DEFAULT DESCRIPTION R16526 (408Eh) Power Good Source 1 3 DC4_OK 0 DC-DC4 status selected as an input to PWR_GOOD 0 = Disabled 1 = Enabled 2 DC3_OK 1 DC-DC3 status selected as an input to PWR_GOOD 0 = Disabled 1 = Enabled 1 DC2_OK 1 DC-DC2 status selected as an input to PWR_GOOD 0 = Disabled 1 = Enabled 0 DC1_OK 1 DC-DC1 status selected as an input to PWR_GOOD 0 = Disabled 1 = Enabled R16527 (408Fh) 9 LDO10_OK 1 LDO10 status selected as an input to PWR_GOOD |
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