HT82R732 datasheet(13/74 Pages) HOLTEK

13 / 74 page

Program Memory

The Program Memory is the location where the user code or program is stored. The device is supplied

with One-Time Programmable, OTP, memory where users can program their application code into the

device. By using the appropriate programming tools, OTP devices offer users the flexibility to freely

develop their applications which may be useful during debug or for products requiring frequent

upgrades or program changes.

Structure

The Program Memory has a capacity of 4Kx16. The Program Memory is addressed by the Program

Counter and also contains data, table information and interrupt entries. Table data, which can be setup

in any location within the Program Memory, is addressed by separate table pointer registers.

Special Vectors

Within the Program Memory, certain locations are reserved for

the reset and interrupts. The location 000H is reserved for use by

the device reset for program initialisation. After a device reset is

initiated, the program will jump to this location and begin

execution.

Look-up Table

Any location within the Program Memory can be defined as a look-up table where programmers can

store fixed data. To use the look-up table, the table pointers must first be setup by placing the lower and

higher order address of the look up data to be retrieved in the table pointer registers, TBLP and TBHP.

These registers define the full range address of the look-up table.

There are three methods to read the Program Memory data by the two table read instructions:

²TABRDC[m]² or ²TABRDL [m]² instructions, respectively. When these instructions are executed,

the lower order table byte from the Program Memory will be transferred to the user defined Data

Memory register [m] as specified in the instruction. The higher order table data byte from the Program

Memory will be transferred to the TBLH special register.

The three methods are shown as follows:

· Using the instruction

²TABRDC [m]², where the table location is defined by TBLP in the current

page (one page=256 words). Here the control bit of the TBHP function, the TBRC bit in the SYSC

· Using the instruction

²TABRDC [m]², where the table location is defined by TBLP and TBHP. Here

the control bit of the TBHP function is enabled.

· The instruction

²TABRDL [m]², where the table location is defined by TBLP in the last page

(0F00H~0FFFH).

Only the destination of the lower-order byte in the table is well-defined, the other bits of the table word

are transferred to the lower portion of TBLH. The Table Higher-order byte register (TBLH) is read

only and cannot be restored. The table pointers (TBLP, TBHP) are read/write registers which indicate

the table location. Before accessing the table, the location must be placed in the TBLP and TBHP

registers (If the software option of the TBHP function is disabled, the value in TBHP has no effect). If

the main routine and the ISR (Interrupt Service Routine) both employ the table read instruction, the

contents of the TBLH in the main routine is likely to be changed by the table read instruction used in

the ISR. As a result errors may occur. In other words, using the table read instruction in the main

routine and in the ISR simultaneously should be avoided. However, if the table read instruction has to

be applied in both the main routine and the ISR, the interrupt should be disabled prior to the table read

HT82R732

e-Banking 8-Bit OTP MCU

Rev. 1.00

October 31, 2013

0 0 0 0 H

R e s e t

0 F F F H

I n t e r r u p t

V e c t o r

0 0 0 4 H

0 0 1 4 H

1 6 b i t s

Program Memory Structure

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