HT82B42RE datasheet(13/84 Pages) HOLTEK

13 / 84 page

Rev. 1.10

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HT82B42R/HT82B42RE

I/O MCU with USB Interface

Power-on Reset Characteristics

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Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

VDD

Conditions

VPOR

VDD Sta�t Voltage to Ensu�e Powe�-on Reset

—

100

�V

RRVDD

VDD Raising Rate to Ensu�e Powe�-on Reset

—

0.03�

—

V/�s

tPOR

Mini�u� Ti�e fo� VDD Stays at VPOR to

Ensu�e Powe�-on Reset

—

�s

Ti me

V DD

V PO R

RR VD D

t PO R

System Architecture

Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed

totheinternalsystemarchitecture.Therangeofdevicestakeadvantageoftheusualfeaturesfound

withinRISCmicrocontrollersprovidingincreasedspeedofoperationandenhancedperformance.

Thepipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstruction

executionareoverlapped,henceinstructionsareeffectivelyexecutedinonecycle,withthe

exceptionofbranchorcallinstructions.An8-bitwideALUisusedinpracticallyalloperations

oftheinstructionset.Itcarriesoutarithmeticoperations,logicoperations,rotation,increment,

decrement,branchdecisions,etc..Theinternaldatapathissimplifiedbymovingdatathroughthe

AccumulatorandtheALU.CertaininternalregistersareimplementedintheDataMemoryand

canbedirectlyorindirectlyaddressed.Thesimpleaddressingmethodsoftheseregistersalong

withadditionalarchitecturalfeaturesensurethataminimumofexternalcomponentsisrequiredto

provideafunctionalI/OandA/Dcontrolsystemwithmaximumreliabilityandflexibility.

Clocking and Pipelining

Thesystemclockisderivedfromaninternaloscillatorandissubdividedintofourinternally

generatednon-overlappingclocks,T1~T4.TheProgramCounterisincrementedatthebeginning

oftheT1clockduringwhichtimeanewinstructionisfetched.TheremainingT2~T4clockscarry

outthedecodingandexecutionfunctions.Inthisway,oneT1~T4clockcycleformsoneinstruction

cycle.Althoughthefetchingandexecutionofinstructionstakesplaceinconsecutiveinstruction

cycles,thepipeliningstructureofthemicrocontrollerensuresthatinstructionsareeffectively

executedinoneinstructioncycle.Theexceptiontothisareinstructionswherethecontentsofthe

ProgramCounterarechanged,suchassubroutinecallsorjumps,inwhichcasetheinstructionwill

takeonemoreinstructioncycletoexecute.

Forinstructionsinvolvingbranches,suchasjumporcallinstructions,twomachinecyclesare

requiredtocompleteinstructionexecution.Anextracycleisrequiredastheprogramtakesone

cycletofirstobtaintheactualjumporcalladdressandthenanothercycletoactuallyexecutethe

branch.Therequirementforthisextracycleshouldbetakenintoaccountbyprogrammersintiming

sensitiveapplications.

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