HT46R002 datasheet(39/83 Pages) HOLTEK

39 / 83 page

Rev. 1.21

April 11, 2017

Rev. 1.21

April 11, 2017

HT46R002/HT46R003

Cost-Effective A/D 8-Bit OTP MCU

HT46R002/HT46R003

Cost-Effective A/D 8-Bit OTP MCU

Timer/Event Counter

Theprovisionoftimerformanimportantpartofanymicrocontroller,givingthedesignerameansof

carryingouttimerelatedfunctions.Thedevicescontainfroman8-bitcount-uptimer.Asthetimer

hasthreedifferentoperatingmodes,theycanbeconfiguredtooperateasageneraltimer,anexternal

eventcounterorasapulsewidthcapturedevice.Theprovisionofaninternalprescalertotheclock

circuitryongivesaddedrangetothetimer.

TherearetwotypesofregistersrelatedtotheTimer/EventCounter0.Thefirstistheregisterthat

containstheactualvalueofthetimerandintowhichaninitialvaluecanbepreloaded.Reading

fromthisregisterretrievesthecontentsoftheTimer/EventCounter0.Thesecondtypeofassociated

registeristheTimerControlRegisterwhichdefinesthetimeroptionsanddetermineshowthetimer

istobeused.Thedevicecanhavethetimerclockconfiguredtocomefromtheinternalclocksource.

Inaddition,thetimerclocksourcecanalsobeconfiguredtocomefromanexternaltimerpin.

Configuring the Timer/Event Counter Input Clock Source

TheTimer/EventCounterclocksourcecanoriginatefromvarioussources,aninternalclockoran

externalpin.Theinternalclocksourceisusedwhenthetimerisinthetimermode.FortheTimer/

EventCounter0,tQIHQIhisinternalclocksourceisfirstdividedbyaprescaler,thedivision

ratioofwhichisconditionedbytheTimerControlRegisterbitsT0PSC2~T0PSC0.Theinternal

clocksourcecanbederivedfromthesystemclockfSYSorfromtheinstructionclockfSYS/4orthe

internallowspeedoscillatorLIRCforTimer/EventCounterselectedbytheclockselectionbits

WDTCLS1~WDTCLS0intheWDTCregister.

AnexternalclocksourceisusedwhentheTimer/EventCounterisintheeventcountingmode,the

clocksourcebeingprovidedonanexternaltimerpinTMR.Dependingupontheconditionofthe

T0EGbit,eachhightolow,orlowtohightransitionontheexternaltimerpinwillincrementthe

counterbyone.

WDT Divider

PWM

8-to-1 MUX

WDT Time-out

(28/fS ~ 215/fS)

LIRC

WDTCLS1,

WDTCLS0

fSYS

fSYS/4

8-stage Prescaler

PWM Circuitry

fS/28

8-to-1 MUX

T0PSC2~T0PSC0

WS2~WS0

To Timer 0 internal clock

Clock Source for Timer/PWM/WDT

T0 ON

Pr el oad R eg is te r

Up C oun te r

Da ta B us

PF D*

TM R

T0 EG

M ode C on tr ol

Ti me r 0 I nt er nal C lo ck

(f T0 CK )

Ov er fl ow

to I nt er ru pt

T0 M1 , T0 M0

T0 OV

Note:“*”meansforHT46R003only.

8-bit Timer/Event Counter 0 Structure

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