XRT8010

312MHZCLOCK&CRYSTAL MULTIPLIERWITHLVDSOUTPUTS

REV. 1.0.2

I

TABLE OF CONTENTS

DESCRIPTION....................................................................................................................1

APPLICATIONS ...........................................................................................................................................1

FEATURES ..................................................................................................................................................1

FIGURE 1. XRT8010 BLOCK DIAGRAM ............................................................................................................................................. 1

FIGURE 2. PIN-OUT OF THE XRT8010 (TOP VIEW) ........................................................................................................................... 2

ORDERING INFORMATION...................................................................................................................... 2

TABLE OF CONTENTS ............................................................................................................I

ABSOLUTE MAXIMUM RATINGS

.........................................................................................................................3

ELECTRICAL CHARACTERISTICS

.......................................................................................................................3

TABLE 1: CATEGORY II INTRINSIC JITTER PER TELCORDIA GR-253-CORE (AT 155MHZ) .................................................................. 4

FIGURE 3. LVDS OUTPUT WAVEFORMS AND TEST CIRCUITS ............................................................................................................ 5

TABLE 2: FREQUENCY SELECTION TABLE ......................................................................................................................................... 5

1.0 CALIBRATION .......................................................................................................................................6

2.0 CRYSTAL SELECTION .........................................................................................................................6

3.0 DATA AND PLOTS ................................................................................................................................6

TABLE 3: POWER-DOWN AND OUTPUT TRI-STATE SELECTION TABLE................................................................................................... 6

FIGURE 4. INTRINSIC JITTER CONNECTION DIAGRAM ......................................................................................................................... 7

FIGURE 5. SIMPLIFIED BLOCK DIAGRAM OF THE XRT8010 AND PECL RECEIVER .............................................................................. 7

FIGURE 6. LVDS OUTPUT @160 MHZ............................................................................................................................................. 8

FIGURE 7. LVDS OUTPUT @ 320 MHZ............................................................................................................................................ 9

FIGURE 8. XRT8010 PHASE NOISE FOR 20 MHZ REFERENCE CRYSTAL ......................................................................................... 10

ORDERING INFORMATION.............................................................................................11

REVISIONS ...................................................................................................................................................12