WM9705SEFLSLASHV datasheet(36/55 Pages) WOLFSON

36 / 55 page

WM9705

Production Data

PD Rev 4.0 December 2003

back. Sample rate is entered in binary form to the appropriate register. Note sample rates should

only be altered when the relevant DAC or ADC is powered ON.

REGISTERS 3AH – SPDIF CONTROL REGISTER

propagated as channel status (or sub-frame in the V case). With the exception of V, this register

should only be written to when the SPDIF transmitter is disabled (SPDIF bit in register 2Ah is ‘0’).

Once the desired values have been written to this register, the contents should be read back to

ensure that the sample rate in particular is supported, then SPDIF validity bit SPCV in register

2Ah should be read to ensure the desired configuration is valid. Only then should the SPDIF

enable bit in register 2Ah be set. This ensures that control and status information start up

correctly at the beginning of SPDIF transmission. WM9705 only supports an SPDIF sample rate

of 48kHz.

CONTROL

BIT

FUNCTION

PRO

Professional; ‘0’ indicates consumer, ‘1’ indicates professional

AUDIB

Non-audio; ‘0’ indicates data is PCM, ‘1’ indicates non-PCM format (eg DD or DTS)

COPY

PRE

Pre-emphasis; ‘0’ indicates not pre-emphasis, ‘1’ indicates 50/15us pre-emphasis

CC[6-0]

Category code; programmed as required by user

Generation level; programmed as required by user

Validity bit; ‘0’ indicates frame valid, ‘1’ indicates frame not valid

Table 20 SPDIF Control Register

VENDOR SPECIFIC REGISTERS (INDEX 5Ah - 7Ah)

These registers are vendor specific. Do not write to these registers unless the Vendor ID register

has been checked first to ensure that the controller knows the source of the AC ‘97 component.

MIXER MUTE PATH (INDEX 5Ah)

Bit 4 (MPM) is used to disable the path between the main input mixer and the lineout mixer, see

Figure 9. Setting this bit to 1, breaks the connection and allows the following combinations:

DAC + PHONE + PCBEEP to line out / headphone out

DAC + CD + LINE + AUX + VID + MIC to mono output

When writing to this register all bits (except MPM) must be written as a 0 or device function can

not be guaranteed. Only the default value can be read from this register.

VENDOR SPECIFIC MODE CONTROL (INDEX 5Ch)

specified functions. This register defaults to all special features ‘disabled’ i.e. All zeros.

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