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R5F104LED датащи(PDF) 96 Page - Renesas Technology Corp

номер детали R5F104LED
подробное описание детали  True Low Power Platform
PDF  213 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F104LED датащи(HTML) 96 Page - Renesas Technology Corp

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RL78/G14
2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85
°C)
R01DS0053EJ0330 Rev. 3.30
Page 96 of 208
Aug 12, 2016
Note 4.
This value as an example is calculated when the conditions described in the “Conditions” column are met.
Refer to Note 3 above to calculate the maximum transfer rate under conditions of the customer.
Note 5.
Use it with EVDD0
≥ Vb.
Note 6.
The smaller maximum transfer rate derived by using fMCK/6 or the following expression is the valid maximum transfer
rate.
Expression for calculating the transfer rate when 1.8 V
≤ EVDD0 < 3.3 V and 1.6 V ≤ Vb ≤ 2.0 V
Note 7.
This value as an example is calculated when the conditions described in the “Conditions” column are met.
Refer to Note 6 above to calculate the maximum transfer rate under conditions of the customer.
Caution
Select the TTL input buffer for the RxDq pin and the N-ch open drain output (VDD tolerance (for the 30- to 52-pin
products)/EVDD tolerance (for the 64- to 100-pin products)) mode for the TxDq pin by using port input mode
register g (PIMg) and port output mode register g (POMg). For VIH and VIL, see the DC characteristics with TTL
input buffer selected.
(Remarks are listed on the next page.)
Maximum transfer rate =
1
[bps]
Baud rate error (theoretical value) =
1
Transfer rate
× 2
-
{-Cb
× Rb × In (1 -
)}
× 3
1.5
Vb
{-Cb
× Rb × In (1 -
)}
1.5
Vb
(
)
× Number of transferred bits
1
Transfer rate
× 100 [%]
* This value is the theoretical value of the relative difference between the transmission and reception sides.



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