HT32F52231 datasheet(21/50 Pages) HOLTEK

21 / 50 page

Rev. 1.51

21 of 50

April 11, 2017

32-Bit ARM® Cortex™-M0+ MCU

HT32F52231/HT32F52241/HT32F52331/HT32F52341

Clock Structure

4-16 MHz

HSE XTAL

8 MHz

HSI RC

32 kHz

LSI RC

Legend:

HSE = High Speed External clock

HSI = High Speed Internal clock

LSE = Low Speed External clock

LSI = Low Speed Internal clock

32.768 kHz

LSE OSC

WDTSRC

PLLSRC

AHB Prescaler

1,2,4,8,16,32

FCLK

( free running clock)

STCLK

(to SysTick)

CK_ADC IP

CK_WDT

WDTEN

CK_REF

CK_HSI/16

CK_HSE/16

CK_SYS/16

CKOUT

CKOUTSRC[2:0]

HSEEN

HSIEN

LSEEN(Note1)

LSIEN(Note1)

fCK_SYS,max = 40 MHz for

HT32F52231/52241

fCK_SYS,max = 48 MHz for

HT32F52331/52241

CK_LSI

CK_LSE

CK_AHB/16

CK_HSI

CK_HSE

PCLK (AFIO, ADC,

SPIx, USART, UARTx,

I2Cx, MCTM, GPTM,

SCTMx, BFTMx, EXTI,

SCI, WDT, RTC)

PLL

Clock

Monitor

PLLEN

CK_LSE

CK_PLL

ADCEN

f CK_PLL,max = 48 MHz

CK_LSI

HCLKS

( to SRAM)

HCLKF

( to Flash)

CM0PEN

FMCEN

CM0PEN

SRAMEN

RTCSRC(Note1)

CK_RTC

RTCEN(Note1)

000

001

010

011

100

101

110

CK_SYS

SW[2:0]

CK_USB

fCK_USB = 48 MHz

USBEN

HCLKC

( to CortexTM-M0+)

CM0PEN

(control by HW)

Prescaler

1 ~ 32

CK_REF

Divider

CKREFPRE

HCLKBM

( to Bus Matrix)

CM0PEN

BMEN

HCLKAPB

( to APB Bridge)

CM0PEN

APBEN

CK_CRC

( to CRC)

CRCEN

Peripherals

Clock

Prescaler

1,2,4,8

ADC

Prescaler

1,2,3,4,8,...

PCLK

PCLK/2

PCLK/4

PCLK/8

SPIEN

SCIEN

CK_GPIO

( to GPIO port)

GPIODEN

GPIOAEN

CKREFEN

HSI Auto

Trimming

Controller

CK_LSE

USB REF Pulse

00x

011

010

111

110

HT32F52331/52341 only

Figure 3. Clock Structure

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