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LP3906 датащи(PDF) 18 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
номер детали LP3906
подробное описание детали  Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C Compatible Interface
PDF  38 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

LP3906 датащи(HTML) 18 Page - National Semiconductor (TI)

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SW1, SW2: Synchronous Step
Down Magnetic DC/DC Converters
(Continued)
V
IN, MIN =ILOAD *(RDSON, PFET +RINDUCTOR)+VOUT
I
LOAD
Load current
R
DSON, PFET
Drain to source resistance of
PFET switch in the triode region
R
INDUCTOR
Inductor resistance
FLEXIBLE POWER SEQUENCING OF MULTIPLE
POWER SUPPLIES
The LP3906 provides several options for power on sequenc-
ing. The two bucks can be individually controlled with
ENSW1 and ENSW2. The two LDOs can also be individually
controlled with ENLDO1 and ENLDO2.
If the user desires a set power on sequence, all four enables
should be tied LOW so that the regulators don’t automati-
cally enable when power is supplied. The user can then
program the chip through I
2C and raise EN_T from LOW to
HIGH to activate the power on sequencing.
POWER ON
EN_T assertion causes the LP3906 to emerge from Standby
mode to Full Operation mode at a preset timing sequence.
By default, the enables for the LDOs and Bucks are inter-
nally pulled up, which causes the part to turn ON automati-
cally. If the user wishes to have a preset timing sequence to
power on the regulators, the external regulator enables must
be tied LOW. Otherwise, simply tie the enables of each
specific regulator HIGH.
EN_T is edge triggered with rising edge signaling the chip to
power on. The EN_T input is deglitched and the default is set
at 1 ms. As shown in the next 2 diagrams, a rising EN_T
edge will start a power on sequence, while a falling EN_T
edge will start a shutdown sequence. If EN_T is high, tog-
gling the external enables of the regulators will have no
effect on the chip.
Default Power ON Sequence:
t
1 (ms)
t
2 (ms)
t
3 (ms)
t
4 (ms)
1.5
2.0
3
6
Note: LP3906 The default Power on delays can be reprogrammed at final
test or by using I2C registers to 1, 1.5, 2, 3, 6, or 11 ms.
The regulators can also be programmed through I
2C to turn
on and off. By default, the I
2C enables for the regulators are
ON.
The regulators are on following the pattern below:
Regulators on = (I
2C enable) AND (External pin enable OR
EN_T high).
20197809
www.national.com
18



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