STA339BWS datasheet(64/79 Pages) STMICROELECTRONICS

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STA339BWS

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DocID015276 Rev 8

7.8

Variable max power correction registers (addr 0x27 - 0x28)

MPCC bits determine the 16 MSBs of the MPC compensation coefficient. This coefficient is

used in place of the default coefficient when MPCV = 1.

7.9

Distortion compensation registers (addr 0x29 - 0x2A)

DCC bits determine the 16 MSBs of the distortion compensation coefficient. This coefficient

is used in place of the default coefficient when DCCV = 1.

7.10

Fault detect recovery constant registers (addr 0x2B - 0x2C)

FDRC bits specify the 16-bit fault detect recovery time delay. When FAULT is asserted, the

TRISTATE output is immediately asserted low and held low for the time period specified by

this constant. A constant value of 0x0001 in this register is approximately 0.083 ms. The

default value of 0x000C gives approximately 0.1 ms.

Note:

0x0000 is a reserved value for these registers.

MPCC15

MPCC14

MPCC13

MPCC12

MPCC11

MPCC10

MPCC9

MPCC8

00011010

MPCC7

MPCC6

MPCC5

MPCC4

MPCC3

MPCC2

MPCC1

MPCC0

11000000

DCC15

DCC14

DCC13

DCC12

DCC11

DCC10

DCC9

DCC8

11110011

DCC7

DCC6

DCC5

DCC4

DCC3

DCC2

DCC1

DCC0

00110011

FDRC15

FDRC14

FDRC13

FDRC12

FDRC11

FDRC10

FDRC9

FDRC8

00000000

FDRC7

FDRC6

FDRC5

FDRC4

FDRC3

FDRC2

FDRC1

FDRC0

00001100

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