CP305-2N3019

NPN - High Current Transistor Die

Die Size

31 x 31 MILS

Die Thickness

9.0 MILS

Base Bonding Pad Size

5.9 x 11.8 MILS

Emitter Bonding Pad Size

6.5 x 13.8 MILS

Top Side Metalization

Al – 30,000Å

Back Side Metalization

Au – 18,000Å

Scribe Alley Width

1.96 MILS

Wafer Diameter

4 INCHES

Gross Die Per Wafer

11,212

The CP305-2N3019 is a silicon NPN transistor designed for high current, general purpose

applications.

MECHANICAL SPECIFICATIONS:

MAXIMUM RATINGS: (TA=25°C)

SYMBOL

UNITS

Collector-Base Voltage

VCBO

140

V

Collector-Emitter Voltage

VCEO

80

V

Emitter-Base Voltage

VEBO

7.0

V

Continuous Collector Current

IC

1.0

A

Operating and Storage Junction Temperature

TJ, Tstg

-65 to +150

°C

ELECTRICAL CHARACTERISTICS: (TA=25°C)

SYMBOL

TEST CONDITIONS

MIN

MAX

UNITS

ICBO

VCB=90V

10

nA

IEBO

VEB=5.0V

10

nA

BVCBO

IC=100μA

140

V

BVCEO

IC=30mA

80

V

BVEBO

IE=100μA

7.0

V

VCE(SAT)

IC=150mA, IB=15mA

0.2

V

VCE(SAT)

IC=500mA, IB=50mA

0.5

V

VBE(SAT)

IC=150mA, IB=15mA

1.1

V

hFE

VCE=10V, IC=100μA

50

hFE

VCE=10V, IC=10mA

90

hFE

VCE=10V, IC=150mA

100

300

hFE

VCE=10V, IC=500mA

50

hFE

VCE=10V, IC=1.0A

15

fT

VCE=10V, IC=50mA, f=20MHz

100

MHz

Cob

VCB=10V, IE=0, f=1.0MHz

12

pF

Cib

VEB=0.5V, IC=0, f=1.0MHz

60

pF

PACKING OPTIONS:

• CP305-2N3019-CT: Singulated die in waffle pack; 400 die per tray.

• CP305-2N3019-WN: Full wafer, unsawn, 100% tested with reject die inked.

• CP305-2N3019-WR: Full wafer, sawn and mounted on plastic ring, 100% tested with reject die inked.

E

B

R0 (12-March 2015)

www.centr a lsemi.

com